公开(公告)号：US11238950B1

公开(公告)日：2022-02-01

申请号：US16925222

申请日：2020-07-09

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Zhongguang Xu ,  Murong Lang ,  Zhenming Zhou

IPC: G11C29/10 ,  G01R31/311 ,  G11C29/52 ,  G11C29/04

Abstract: An accelerated seasoning cycle criterion is associated with a memory die of a number of memory dies. The memory die is subjected to one or more accelerated seasoning conditions during accelerated seasoning cycles. Responsive to determining that the accelerated seasoning cycle criterion has been satisfied, a defect scan is performed on the memory die. The memory die is associated with a respective reliability bin of a plurality of reliability bins in view of a result of the defect scan, wherein the result of the defect scan satisfies one or more predetermined threshold reliability criteria corresponding to the respective reliability bin.

公开(公告)号：US20220027077A1

公开(公告)日：2022-01-27

申请号：US16934406

申请日：2020-07-21

Applicant: Micron Technology, Inc.

Inventor： Murong Lang ,  Tingjun Xie ,  Wei Wang ,  Frederick Adi ,  Zhenming Zhou ,  Jiangli Zhu

IPC: G06F3/06

Abstract: A first operating characteristic and a second operating characteristic of a memory sub-system are determined. A write-to-read delay time is set in view of the first operating characteristic and the second operating characteristic. A read operation associated with a memory unit is executed following a period of at least the write-to-read delay time from a time of an execution of a write operation associated with the memory unit.

公开(公告)号：US11231870B1

公开(公告)日：2022-01-25

申请号：US16990928

申请日：2020-08-11

Applicant: Micron Technology, Inc.

Inventor： Mikai Chen ,  Murong Lang ,  Zhenming Zhou

IPC: G06F3/00 ,  G06F3/06 ,  G11C13/00 ,  G11C16/04

Abstract: A method includes performing a quantity of write cycles on memory components. The method can further include monitoring codewords, and, for each of the codewords including a first error parameter value, determining a second error parameter value. The method can further include determining a probability that each of the codewords is associated with a particular one of the second error parameter values at the first error parameter value and determining a quantity of each of the codewords that are associated with each of the determined probabilities. The method can further include determining a statistical boundary of the quantity of each of the codewords and determining a correlation between the quantity of write cycles performed and the corresponding determined statistical boundary of the quantity of each of the codewords.

公开(公告)号：US20220013192A1

公开(公告)日：2022-01-13

申请号：US17467961

申请日：2021-09-07

Applicant: Micron Technology, Inc.

Inventor： Murong Lang ,  Zhongguang Xu ,  Zhenming Zhou

IPC: G11C29/50 ,  G06F11/07 ,  G06F11/10 ,  G11C29/44 ,  G11C29/12

Abstract: A value corresponding to an operating characteristic of a memory sub-system is determined. The value is compared to a threshold level to determine whether a condition is satisfied. In response to satisfying the condition, a read scrub operation associated with the memory sub-system is executed.

公开(公告)号：US11222710B1

公开(公告)日：2022-01-11

申请号：US16988897

申请日：2020-08-10

Applicant: Micron Technology, Inc.

Inventor： Mikai Chen ,  Zhenming Zhou ,  Zhenlei Shen ,  Murong Lang

IPC: G11C29/44 ,  G11C29/02 ,  G11C29/12 ,  G11C5/06 ,  G11C5/02

Abstract: A method includes determining, for a plurality of memory dice, a signal reliability characteristic and ranking the plurality of memory dice based, at least in part, on the determined reliability characteristics. The method can further include arranging the plurality of memory dice to form a memory device based, at least in part, on the ranking.

公开(公告)号：US10971228B2

公开(公告)日：2021-04-06

申请号：US16551104

申请日：2019-08-26

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Murong Lang ,  Tingjun Xie ,  Zhenming Zhou

IPC: G11C16/34 ,  G11C13/00 ,  G11C7/10 ,  H01L27/24

Abstract: A request to apply a plurality of voltage pulses to memory cells of a memory device can be received. A number of the voltage pulses can be applied the memory cells of the memory device, where a voltage pulse of the number of the voltage pulses places the memory cells of the memory device at a voltage level associated with a defined voltage state. A set of bit error rates associated with the memory cells of the memory device at the voltage level can be determined. Responsive to determining that the set of bit error rates does not satisfy a threshold condition, an additional number of the voltage pulses to the memory cells of the memory device can be applied.

公开(公告)号：US20210065790A1

公开(公告)日：2021-03-04

申请号：US16551104

申请日：2019-08-26

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Murong Lang ,  Tingjun Xie ,  Zhenming Zhou

IPC: G11C13/00 ,  H01L27/24 ,  G11C7/10

Abstract: A request to apply a plurality of voltage pulses to memory cells of a memory device can be received. A number of the voltage pulses can be applied the memory cells of the memory device, where a voltage pulse of the number of the voltage pulses places the memory cells of the memory device at a voltage level associated with a defined voltage state. A set of bit error rates associated with the memory cells of the memory device at the voltage level can be determined. Responsive to determining that the set of bit error rates does not satisfy a threshold condition, an additional number of the voltage pulses to the memory cells of the memory device can be applied.