Synchronization Control for Packet Data Convergence Protocol (PDCP) Duplicate Transmissions

    公开(公告)号:US20210051611A1

    公开(公告)日:2021-02-18

    申请号:US17051383

    申请日:2018-05-10

    Applicant: Apple Inc.

    Abstract: A transmitter (e.g. a packet data convergence protocol, PDCP, in the transmitter), which may be a base station for downlink communications or a user equipment device for uplink communications, may control timing of the delivery of duplicate (same) packets to multiple (e.g. two) wireless links (e.g. radio link control links) for transmission to a receiver, based at least on synchronization information received from the receiver. The duplicate packets may be transmitted over the multiple wireless links to the receiver, which may receive the duplicate packets over the multiple wireless links. The receiver may collect and/or generate synchronization information indicative of the timing or latency between the multiple wireless links, based at least on the respective receive timings of the duplicate packets over the multiple wireless links. The receiver may transmit a report containing the synchronization information to the transmitter periodically and/or in response to a trigger event.

    Dynamically controlling random access memory retention in a wireless device

    公开(公告)号:US10896138B2

    公开(公告)日:2021-01-19

    申请号:US15472420

    申请日:2017-03-29

    Applicant: Apple Inc.

    Inventor: Li Su Longda Xing

    Abstract: A wireless communication device (UE) may include random access memory and associated software configured to selectively place different memory banks into either an active power on mode, retention mode, or power off mode. The selective placement of memory banks into different modes may be performed based on a variety of factors including software module voting information, a current power mode of the memory banks, one or more software program(s) and/or data currently stored on the memory banks, and a counter that counts an amount of time during which a memory bank is not accessed. The placement of memory banks into different modes may be controlled by a memory controller coupled to the memory banks.

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