Abstract:
A double gate metal-oxide semiconductor field-effect transistor (MOSFET) includes a fin, a first gate and a second gate. The first gate is formed on top of the fin. The second gate surrounds the fin and the first gate. In another implementation, a triple gate MOSFET includes a fin, a first gate, a second gate, and a third gate. The first gate is formed on top of the fin. The second gate is formed adjacent the fin. The third gate is formed adjacent the fin and opposite the second gate.
Abstract:
The present invention discloses a method and terminal for selecting a random access resource, the method includes: the terminal receives the physical downlink control channel signaling sent by a system; the terminal determines the first subframe which meets a condition A and contains a random access resource from the subsequent subframes of the subframe receiving the physical downlink control channel signaling, the condition A is that the time difference between the first subframe and the subframe receiving the physical downlink control channel signaling is greater than or equal to k, k is the time delay defined by the physical layer of the terminal; and the terminal starts a selection on the subframe containing a random access source from the first subframe.
Abstract:
The present invention relates to a method for the automatic identification of at least one informative data filter from a data set that can be used to identify at least one relevant data subset against a target feature for subsequent hypothesis generation, model building and model testing. The present invention describes methods, and an initial implementation, for efficiently linking relevant data both within and across multiple domains and identifying informative statistical relationships across this data that can be integrated into agent-based models. The relationships, encoded by the agents, can then drive emergent behavior across the global system that is described in the integrated data environment.
Abstract:
A downlink receiving status feedback method is disclosed. The method comprises: a control parameter, which is used for indicating a feedback mode used by a terminal for feeding back downlink receiving status, is carried in a radio resource control (RRC) signaling which is transmitted to the terminal (1) by a base station (2). The terminal feeds data receiving status corresponding to PDSCHs in multiple downlink sub-frames back to the base station in one uplink sub-frame according to the current feedback mode, current configurations of uplink sub-frames and downlink sub-frames, and an uplink feedback timing relation defined by a system.
Abstract:
The invention discloses a method for generating a group identifier of the random access response message. The group identifier is determined according to the serial number of the subframe in which the random access time slot of random access preamble message transmitted by the terminal lies and the serial number of the random access channel in which the random access time slot lies. A random access method and a random access response method in a cellular radio communication system are also provided. Using the method of the present invention, the terminal needs not acquire the absolute system time of the cellular system in which the random access time slot lies, and can access the cellular radio communication system rapidly and accurately.
Abstract:
A method for classifying users is provided, which includes obtaining user attribute information of a user, matching the user attribute information with pre-determined user groups and/or pre-determined characters, and classifying the user into a user group and/or character that is matched successfully. A device for classifying users, a method for collecting and analyzing behaviors, and a system for collecting and analyzing behaviors are also provided.
Abstract:
A device includes a fin, a first gate and a second gate. The first gate is formed adjacent a first side of the fin and includes a first layer of material having a first thickness and having an upper surface that is substantially co-planar with an upper surface of the fin. The second gate is formed adjacent a second side of the fin opposite the first side and includes a second layer of material having a second thickness and having an upper surface that is substantially co-planar with the upper surface of the fin, where the first thickness and the second thickness are substantially equal to a height of the fin.
Abstract:
The present invention is directed to compositions and methods related to the synthesis and modification of uridine-5′-diphospho-sulfoquinovose (UDP-SQ). In particular, the methods of the present invention comprise the utilization of recombinant enzymes from Arabidopsis thaliana, UDP-glucose, and a sulfur donor to synthesize UDP-SQ, and the subsequent modification of UDP-SQ to form compounds including, but not limited to, 6-sulfo-α-D-quinovosyl diaclyglycerol (SQDG) and alkyl sulfoquinovoside. The compositions and methods of the invention provide a more simple, rapid means of synthesizing UDP-SQ, and the subsequent modification of UDP-SQ to compounds including, but not limited to, SQDG.
Abstract:
A method of manufacturing a semiconductor device includes providing a strained-silicon semiconductor layer over a silicon germanium layer, and partially removing a first portion of the strained-silicon layer. The strained-silicon layer includes the first portion and a second portion, and a thickness of the second portion is greater than a thickness of the first portion. Initially, the first and second portions of the strained-silicon layer initially can have the same thickness. A p-channel transistor is formed over the first portion, and a n-channel transistor is formed over the second portion. A semiconductor device is also disclosed.
Abstract:
A semiconductor device includes a substrate and an insulating layer on the substrate. The semiconductor device also includes a fin structure formed on the insulating layer, where the fin structure includes first and second side surfaces, a dielectric layer formed on the first and second side surfaces of the fin structure, a first gate electrode formed adjacent the dielectric layer on the first side surface of the fin structure, a second gate electrode formed adjacent the dielectric layer on the second side surface of the fin structure, and a doped structure formed on an upper surface of the fin structure in the channel region of the semiconductor device.