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公开(公告)号:US20220394081A1
公开(公告)日:2022-12-08
申请号:US17338081
申请日:2021-06-03
Applicant: MELLANOX TECHNOLOGIES, LTD.
Inventor: Ron Yuval Efraim , Yamin Friedman , Eitan Hirshberg
Abstract: A system which facilitates efficient operation of plural agents, the system comprising a device which services the plural agents; and functionality which resides on the device and which provides a given quality of service, defined in terms of at least one resource, to at least one subset of agents from among the plural agents.
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公开(公告)号:US20220385598A1
公开(公告)日:2022-12-01
申请号:US17824954
申请日:2022-05-26
Applicant: MELLANOX TECHNOLOGIES, LTD.
Inventor: Boris Pismenny , Dotan David Levi , Gal Yefet
IPC: H04L49/552 , H04L49/90 , H04L49/9057 , H04W28/04 , H04L49/901 , H04L65/61 , H04L65/65
Abstract: A method for communication includes mapping transport sequence numbers in headers of data packets received from a network to respective buffers in a memory of a host computer. At least a part of the data from payloads of the received data packets is written directly to the respective buffers.
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公开(公告)号:US20220385590A1
公开(公告)日:2022-12-01
申请号:US17336080
申请日:2021-06-01
Applicant: Mellanox Technologies, Ltd.
Inventor: Zachy Haramaty , Liron Mula , Alon Singer , Eduard Kvetny , Aviv Kfir
IPC: H04L12/801 , H04L12/861 , H04L12/707 , H04L29/06
Abstract: An apparatus includes an input interface to receive incoming packets from a first network device and an output interface to send outgoing packets to a second network device. Media access control security (MACsec) circuitry is coupled between the input interface and the output interface. Bypass flow-control (FC) circuitry is coupled between the input interface and the MACsec circuitry. The bypass FC circuitry is to detect an FC packet in the incoming packets and pass the FC packet passively to the output interface to enable end-to-end flow control directly between the first network device and the second network device.
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公开(公告)号:US20220377014A1
公开(公告)日:2022-11-24
申请号:US17874352
申请日:2022-07-27
Applicant: MELLANOX TECHNOLOGIES, LTD.
Inventor: Avi Urman , Lior Narkis , Noam Bloch
IPC: H04L45/745 , H04L69/22 , G06F13/42
Abstract: A communication apparatus includes a host interface, connected to a peripheral component bus so as to communicate with a CPU and a memory of a host computer. A network interface is connected to a network. Packet processing circuitry is configured to receive from a first interface a data packet including a set of one or more headers that include header fields having respective values, to identify, responsively to at least one of the header fields, a corresponding entry in a header modification table that specifies a header modification operation, to modify the set of headers in accordance with the header modification operation, to check whether the entry specifies an additional header modification operation, to output the modified set of headers if the entry does not specify an additional header modification operation, and, if the entry specifies an additional header modification operation, to feed-back the modified set of headers.
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公开(公告)号:US11497136B2
公开(公告)日:2022-11-08
申请号:US16502686
申请日:2019-07-03
Applicant: Mellanox Technologies, Ltd.
Inventor: Avner Badihi , Eyal Babish
Abstract: A universal replaceable fan unit and method of reversing an airflow direction of a universal replaceable fan unit is provided. The universal replaceable fan unit includes a fan assembly designed to create an airflow from an intake end to an output end. The universal replaceable fan unit also includes a fan mounting that receives and secures the fan assembly in an operable position. The fan mounting includes a frame member and a securing member. The fan mounting is designed to allow the fan assembly to be moved between a first position defining a first airflow direction and a second position defining a second airflow direction. The first airflow direction is opposite the second airflow direction. The universal replaceable fan unit further includes an electrical connector removably attached to the fan assembly. The electrical connector allows electricity to be provided to the fan assembly for operation.
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公开(公告)号:US20220350506A1
公开(公告)日:2022-11-03
申请号:US17244579
申请日:2021-04-29
Applicant: Mellanox Technologies LTD.
Inventor: Barak Gafni , Aviv Kfir
IPC: G06F3/06
Abstract: Devices, methods, and systems are provided. In one example, a device is described to include a bandwidth-constrained resource and a controller that dynamically allocates a proportional consumption of storage to the bandwidth-constrained resource thereby enabling the bandwidth-constrained resource to provide bandwidth to a consuming entity. The controller may allocate the proportional consumption of the storage to the bandwidth-constrained resource based on a current state of the bandwidth-constrained resource.
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公开(公告)号:US11487066B2
公开(公告)日:2022-11-01
申请号:US17117867
申请日:2020-12-10
Applicant: MELLANOX TECHNOLOGIES, LTD.
Inventor: Elad Mentovich , Yaakov Gridish , Anna Sandomirsky , Alon Rubinstein , Nimrod Rockman , Dimitrios Kalavrouziotis
Abstract: A package includes a light emitting portion configured to emit light, a lens including a first lens surface and a second lens surface, a protective layer between the light emitting portion and the first lens surface and that shields the first lens surface from a surrounding environment, and an optical component that redirects light output from the second lens surface. The first lens surface is configured to receive the emitted light from the light emitting portion, the second lens surface is configured output light that has passed through the first lens surface, and the protective layer has a refractive index greater than 1.5.
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公开(公告)号:US11476928B2
公开(公告)日:2022-10-18
申请号:US16921993
申请日:2020-07-07
Applicant: Mellanox Technologies, Ltd.
Inventor: Dotan David Levi , Avi Urman , Lior Narkis , Liron Mula , Paraskevas Bakopoulos , Ariel Almog , Roee Moyal , Gal Yefet
IPC: H04B7/26 , H04L49/351 , H04L49/90 , H04W72/04 , H04W74/08
Abstract: A network element one or more network ports, network time circuitry and packet processing circuitry. The network ports are configured to communicate with a communication network. The network time circuitry is configured to track a network time defined in the communication network. In some embodiments the packet processing circuitry is configured to receive a definition of one or more timeslots that are synchronized to the network time, and to send outbound packets to the communication network depending on the timeslots. In some embodiments the packet processing circuitry is configured to process inbound packets, which are received from the communication network, depending on the timeslots.
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公开(公告)号:US11469768B2
公开(公告)日:2022-10-11
申请号:US17188696
申请日:2021-03-01
Applicant: MELLANOX TECHNOLOGIES, LTD.
Inventor: Igal Kushnir , Eshel Gordon , Roi Levi
Abstract: A digital to analog converter (DAC) includes a first amplifier configured to receive a first bit of a data block as an input and output a first signal based on a value of the first bit of the data block, a first filter circuit configured to filter the first signal, an output configured to output an analog signal based on a combination of the filtered first signal and a second signal that represents a value of a second bit of the data block.
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公开(公告)号:US11456805B2
公开(公告)日:2022-09-27
申请号:US17438143
申请日:2019-05-08
Applicant: Mellanox Technologies, Ltd.
Inventor: Don Becker , Dmitrios Kalavrouziotis , Paraskevas Bakopoulos , Vladimr Iakolev , Elad Mentovich
Abstract: A passive dual polarization unit and coherent transceiver and/or receiver including one or more passive dual polarization units are provided. An example passive dual polarization unit includes a polarization splitter configured to split an input signal into a TE mode and TM mode signals; TE/TM splitters each designed to split the TE/TM mode signals into first TE/TM signals and second TE/TM signals; a first TE signal polarization rotation component for receiving the first TE signal and providing a third TM signal having the same magnitude and time dependence as the first TE signal; a first TM signal polarization rotation component for receiving the first TM signal and providing a third TE signal having the same magnitude and time dependence as the first TM signal; and TE/TM couplers that couple the second TE/TM signals and the third TE/TM signals to generate output TE/TM signals.
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