Abstract:
The present invention relates to a driving circuit for a display panel, which comprises a pre-charge power supply, a pre-charge switch, a buffer circuit, and a plurality of resistive devices. The pre-charge switch is coupled between the pre-charge power supply and a capacitor of the display panel. The buffer circuit is used for buffering a data signal and producing a buffer signal. The plurality of resistive devices is connected in series and coupled to the buffer circuit, and produces a plurality of driving signals therebetween according to the buffer signal. The driving circuit first closes the pre-charge switch to make the pre-charge power supply charge the capacitor. Then, one of the plurality of driving signals charges the capacitor. Thereby, the driving time can be shortened, and power of the display can be saved by avoiding power consumption on resistors.
Abstract:
The present invention relates to an analog-to-digital converting circuit, which comprises an integrating circuit, a reference signal generating circuit, a comparator, and a first counting circuit. The integrating circuit integrates an input signal for producing an integration signal. The reference signal generating circuit produces a plurality of reference signals. The comparator receives the integration signal and the plurality of reference signals, and compares the integration signal to the plurality of reference signals sequentially for producing a plurality of comparison signals. The first counting circuit receives the plurality of comparison signals produced by the comparator, and starts to count the plurality of comparison signals for producing a reset signal and resetting the integrating circuit. Because the integrating circuit is not reset once until the comparator produces the plurality of comparison signals, the number of times of resetting the integrating circuit can be reduced, and hence reducing the integral nonlinearity effect. Accordingly, the accuracy of the analog-to-digital converting circuit is enhanced.
Abstract:
The present invention discloses a driving method for increasing gray level, wherein the PWM mode is added into the FRM mode, and the PWM mode is implemented with the common drive circuit; the section of the horizontal synchronous signal of a frame interval is divided into multiple sub-sections according to the requirement of the PWM mode; the control of the length of the turn-on period within a frame interval is implemented with a redesigned control circuit, and none special drive circuit is needed.
Abstract:
The present invention discloses an apparatus for slew rate enhancement of an operational amplifier, wherein an auxiliary control device and an auxiliary output device are added to the output stage of an operational amplifier. The auxiliary control device mirrors the current of the output stage and then compares the mirrored current with a reference current to generate an auxiliary push/pull control signal, which is used to control the auxiliary output device. When the output signal is different from the input signal, the auxiliary control device turns on the auxiliary output device to provide an auxiliary output current for the output terminal. When the output signal is equal to the input signal, the auxiliary output device is turned off.
Abstract:
An access structure for an internal memory of driving control elements includes a transformation and compression module to transform three primary color signals of graphic data to YCbCr signals and compress the YCbCr signals, thereby to reduce storage requirement so that a given internal memory in a driving control element can store bigger or more image and graphic data, a memory module to store the compressed YCbCr signals and a decompression transformation module to read and decompress the compressed YCbCr signals, and transform the YCbCr signals to three primary color signals to output image data.
Abstract:
This invention relates to a quick-recovery low dropout linear regulator (LDO), which utilizes a current-detection circuit to detect the magnitude of the output current, and the output current compares with a reference current so as to dynamically adjust the bias-current of the 2nd stage amplifier such that the system remains stable even when the output current is high resulting from the damping ratio ζ is still greater than 1. As a result, the output voltage can quickly recover stability from a large and sudden change of the output current.
Abstract:
A shared pixels rendering display includes the procedures of taking samples of sub-pixels (r, g, b) of original pixels that mate the pixel layout (R, G, B) of a color filter; determining content variations of neighboring pixels after sampling, and redistributing after a weighted ratio has been applied to the neighboring pixels of the same color; and a driving IC distributing pixel signals after sampling and weighted ratio redistributing to a mating color filter for displaying. By means of the sampling and weighted ratio redistribution, signal channels required for the display area may be reduced. Hence by using human eye vision error, unnecessary image pixels may be reduced, and the number of required driving IC decreases.
Abstract:
The present application discloses a bump structure and a manufacturing method thereof. The bump structure comprises a first bump layer disposed on a chip and a second bump layer disposed on the first bump layer, and the hardness of the first and second bump layers are different, and both materials of the first and second bump layers are the same conductive material. Thus, when the chip is connected with a substrate through the bump structure and a force applied to the bump structure, it is not easily to cause that the bump structure makes a damage on the chip, and the bump structure according to the present invention is to enhance the structure characteristic and prevented from damaging.
Abstract:
The present application discloses a driving architecture for display panel, which comprises a plurality of drivers and a plurality of driving groups. Each driver includes an enable input terminal and is coupled to at least one display element of a display panel. The driving groups are disposed on the display panel and mutually coupled in series. Each driving group includes the drivers, the enable input terminals of the drivers of at least one driving group are mutually coupled for mutually transmitting an enable signal, and the enable signal is configured to drive the drivers. The driving architecture according to the present application is applied to the display panel, the number of signal lines may be reduced effectively, the normal operation of the display panel may be maintained, and the usage lifetime of the display panel may be extended.
Abstract:
The present invention provides a bump structure of chip disposed on a surface of a chip and comprises a plurality of connecting-bump sets. Each connecting-bump set includes a first connecting hum and a second connecting hump. The first connecting bump and the second connecting bump include corresponding blocking structures. While disposing the chip on a board member, the blocking structure of the first connecting bump and the blocking structure of the second connecting bump block the conductive medium and retard the flow of the conductive medium. The conductive medium is forced to flow between the first connecting bump and the second connecting bump and thus preventing the conductive particles in the conductive medium from leaving the surfaces of the connecting bumps. In addition, there is a flow channel between the first and second connecting bumps. One or more width of the flow channel is between 0.1 μm and 8 μm.