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公开(公告)号:US11435525B2
公开(公告)日:2022-09-06
申请号:US16874176
申请日:2020-05-14
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor: Tetsuya Iida , Yasutaka Nakashiba
Abstract: A semiconductor device includes a first insulating film, a first optical waveguide and a second optical waveguide. The first insulating film has a first surface and a second surface opposite to the first surface. The first optical waveguide is formed on the first surface of the first insulating film. The second optical waveguide is formed on the second surface of the first insulating film. The second optical waveguide, in plan view, overlaps with an end portion of the first optical waveguide without overlapping with another end portion of the first optical waveguide.
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公开(公告)号:US20220268809A1
公开(公告)日:2022-08-25
申请号:US17553226
申请日:2021-12-16
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor: Kazuhiro SAKAGUCHI
IPC: G01R1/073
Abstract: Provided is a technique capable of improving test efficiency of semiconductor devices. A test apparatus includes a probe card having a plurality of measurement sites that contact with a plurality of semiconductor devices formed on a semiconductor wafer; a control unit configured to generate map information, probe-card form information, and contact-position information, the map information including position information and peculiar information of the semiconductor devices on the semiconductor wafer, the probe-card form information including arrangement information of the measurement sites, the contact-position information indicating a contact position that is a range of the semiconductor device tested at one time by the probe card based on constrained-condition information of limiting contact with the probe card; and a position control unit configured to control a relative position between the probe card and the semiconductor wafer based on the contact-position information.
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公开(公告)号:US11425542B2
公开(公告)日:2022-08-23
申请号:US16671960
申请日:2019-11-01
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor: Hiroshi Chano , Suguru Fujita
IPC: H04W4/40 , H04W72/00 , H04B17/327 , H04W56/00 , H04W64/00
Abstract: A semiconductor device includes a communication unit which receives a frame at a first transmission period, demodulates control information from a received frame, modulates transmission data, and broadcasts a modulated transmission data at a second transmission period as a radio frequency packet signal, a period determination unit which determines the second transmission period based on vehicle information, and a transmission and reception control unit which generates a transmission timing trigger signal for determining a transmission timing of the transmission data based on the control information and the second transmission period, and outputs the transmission data to the communication unit in synchronization with the transmission timing trigger signal. The second transmission period is equal to or longer than the first transmission period.
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公开(公告)号:US20220260504A1
公开(公告)日:2022-08-18
申请号:US17587357
申请日:2022-01-28
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor: Takuo FUNAYA
Abstract: A reliability prediction method includes: calculating a change of each of a plurality of alloy phases at a bonding portion between an electrode pad and a bonding wire; setting a generation of a metal oxide phase caused by a corrosion reaction, based on an initial crack structure of the bonding portion; calculating an elastic strain energy at each of specified portions of the bonding portion; setting a progress of a crack, based on the elastic strain energy at each of the specified portions; and predicting a lifetime of the semiconductor device, based on a length of the crack due to the progress of the crack.
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公开(公告)号:US20220255994A1
公开(公告)日:2022-08-11
申请号:US17173571
申请日:2021-02-11
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor: Takuro NISHIKAWA
IPC: H04L29/08 , H04L12/40 , H04L12/861
Abstract: A data processing device includes a first CPU (Central Processing Unit), a first memory, a CAN (Controller Area Network) controller and a system bus coupled to the first CPU, the first memory and the CAN controller, wherein the CAN controller comprises a receive buffer that stores a plurality of messages each of which has a different ID, and a DMA (Direct Memory Access) controller that selects the latest message among messages having a fist ID stored in the receive buffer and transfers the selected latest message to the first memory, wherein the message is one of CAN, CAN FD and CAN XL messages.
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公开(公告)号:US11387334B2
公开(公告)日:2022-07-12
申请号:US16858276
申请日:2020-04-24
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor: Takehiro Ueda
IPC: H01L29/417 , C23C18/16 , H01L21/288
Abstract: The semiconductor device includes a first electrode, a second electrode electrically coupled to the first electrode, and a third electrodes electrically coupled to at least one of the first and the second electrode, a first plating deposition portion on the first electrode, a second and a third plating deposition portions formed on the second and the third electrode, respectively. The areas of the second and the third plating deposition portion are smaller than the area of the first plating deposition portion. The periphery length of the third plating deposition portion is longer than the periphery length of the second plating deposition portion.
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公开(公告)号:US20220216866A1
公开(公告)日:2022-07-07
申请号:US17560671
申请日:2021-12-23
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor: Issei KASHIMA , Atsushi TSUDA
IPC: H03K17/60 , H03K17/687 , H03K5/24
Abstract: To provide a technique for detecting a low voltage of a power-on reset circuit. A semiconductor device has a power-on reset circuit including: a first bipolar transistor; a second bipolar transistor formed by connecting a plurality of bipolar transistors in parallel; a detection-voltage adjusting resistance element; a temperature-characteristic adjusting resistance element; a current adjusting resistance element; and a comparator.
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公开(公告)号:US11375353B2
公开(公告)日:2022-06-28
申请号:US16851936
申请日:2020-04-17
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor: Suguru Fujita , Hiroshi Chano
IPC: H04W4/46
Abstract: A radio communication device includes an application execution unit which generates first transmission data including first application identification information, a communication unit which receives a message including first reception data including the first application identification information, and an occupancy rate determination unit including a transmission ID number counter which counts the number of first application identification information included in the first transmission data and which outputs a count result as a first transmission ID count value, a reception ID number counter which counts the number of first application identification information included in the first reception data and which outputs a count result as a first reception ID count value, and a comparison unit which compares the first transmission ID count value with the first reception ID count value to determine the number of transmission data and the number of reception data have a predetermined ratio.
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公开(公告)号:US11360234B2
公开(公告)日:2022-06-14
申请号:US16831070
申请日:2020-03-26
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor: Takuya Mizokami , Masahiro Araki
Abstract: The present invention provides an electrode device, semiconductor device and a semiconductor system capable of accuracy detecting an object to be detected. According to one embodiment, the electrode device 11 is used for detecting the capacitance of the mutual capacitance system, and includes a reception electrode PR1, a transmission electrode PX1 arranged to face the reception electrode PR1, a transmission electrode PX2 arranged to face the reception electrode PR1 with the transmission electrode PX1 interposed therebetween, and a dielectric board 101 provided between the transmission electrode PX1 and the transmission electrode PX2 to fix the distance and the dielectric constant between the transmission electrode PX1 and the transmission electrode PX2.
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公开(公告)号:US11358546B2
公开(公告)日:2022-06-14
申请号:US16676047
申请日:2019-11-06
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor: Masayuki Daito
IPC: G06F9/46 , B60R16/023 , G05B13/02 , G06F9/48
Abstract: A semiconductor device includes an operation resource which performs a plurality of ECU functions, a peripheral resource which is shared by the plurality of ECU functions and a control mechanism which controls a period in which one of the ECU functions uses the peripheral resource. The control mechanism calculates, based on a budget value which is given in advance and is a performance allocation, a use prohibition period in which the one of the ECU functions is prohibited from using the peripheral resource within the predetermined unit time.
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