System and method for connecting a universal serial bus device to a host computer system

    公开(公告)号:US07043587B2

    公开(公告)日:2006-05-09

    申请号:US09957253

    申请日:2001-09-20

    CPC classification number: G06F9/4411

    Abstract: A method and system for controlling the addition of a USB device to a host computer system via a hardware hot plug detector that monitors USB ports. The differential signal lines connecting to the USB device are logically OR'ed together, such that logically high D+ or D− signals from the USB device signal a central processing unit's (CPU) system management interrupt (SMI) line to initiate system management mode (SMM). Entering SMM transfers control of the host computer system to an SMI Interrupt Handler BIOS, which resides in the SMM address space of the hose computer system. The SMM BIOS is loaded into the SMM address space during Power On Self Test (POST) and is secured prior to booting the Operating System (OS). The SMM BIOS code contains instructions as to whether or not the connected USB device should be made visible to the operating system of the computer. If the device is not authorized, it is disabled, the D+/D− lines are not connected to the USB host controller, and the SMI signal is cleared, allowing the computer to continue operation without the operating system ever being aware of the USB device.

    Method and system for providing a flexible temperature design for a computer system
    164.
    发明授权
    Method and system for providing a flexible temperature design for a computer system 有权
    为计算机系统提供灵活的温度设计的方法和系统

    公开(公告)号:US06922787B2

    公开(公告)日:2005-07-26

    申请号:US09929807

    申请日:2001-08-14

    CPC classification number: G06F8/65 G06F1/206 G06F1/3203 Y02D10/42

    Abstract: A method and system for providing correct operational parameters for up-level design components utilized within a computer system after a low level basic input/output system (BIOS) code has been qualified. A patch file is created or obtained for a component that is added to a computer system after a BIOS code has been qualified for the computer system. The patch file includes the operating parameters (or profiles) of the component. The flash module is designed with a memory block reserved for holding data from the patch file, which can be updated independently of the rest of the flash module. The Advance Configuration Program Interface (ACPI) or advanced power management (APM) code of the computer system is modified to dynamically read the parameters from this memory block and update their respective functions accordingly. During set up of the computer system, the patch file is flashed into the reserved block of the flash module. The data is merged by the FLASH utility into the existing BIOS so that the computer system has the correct parameters for the particular component.

    Abstract translation: 一种方法和系统,用于在低级基本输入/输出系统(BIOS)代码被限定之后,为在计算机系统内使用的上位设计组件提供正确的操作参数。 为BIOS计算机系统的BIOS代码合格后,为添加到计算机系统的组件创建或获取补丁文件。 补丁文件包括组件的操作参数(或配置文件)。 闪存模块设计有一个保留用于保存补丁文件中的数据的存储块,可以独立于闪存模块的其余部分进行更新。 修改计算机系统的高级配置程序接口(ACPI)或高级电源管理(APM)代码,以动态地从该存储器块读取参数并相应地更新其各自的功能。 在设置计算机系统期间,补丁文件闪存到闪存模块的保留块中。 数据由FLASH实用程序合并到现有BIOS中,以便计算机系统具有特定组件的正确参数。

    Reducing the boot time of a TCPA based computing system when the Core Root of Trust Measurement is embedded in the boot block code
    165.
    发明申请
    Reducing the boot time of a TCPA based computing system when the Core Root of Trust Measurement is embedded in the boot block code 失效
    当信任测度核心嵌入在引导块代码中时,减少基于TCPA的计算系统的启动时间

    公开(公告)号:US20050108564A1

    公开(公告)日:2005-05-19

    申请号:US10712237

    申请日:2003-11-13

    CPC classification number: G06F21/572 G06F21/575

    Abstract: A method, computer program product and system for reducing the boot time of a TCPA based computing system. A flash memory in the TCPA based computing system may include a register comprising bits configured to indicate whether the segments of the flash memory have been updated. The flash memory may further include a table configured to store measurements of the segments of the flash memory. The flash memory may further include a boot block code that includes a Core Root of Trust for Measurement (CRTM). The CRTM may read the bits in the register to determine if any of the segments of the flash memory have been updated. The CRTM may further obtain the measurement values in the table for those segments that store the POST BIOS code that have not been updated thereby saving time from measuring the POST BIOS code and consequently reducing the boot time.

    Abstract translation: 一种用于减少基于TCPA的计算系统的启动时间的方法,计算机程序产品和系统。 基于TCPA的计算系统中的闪速存储器可以包括寄存器,其包括被配置为指示闪速存储器的段是否已被更新的位。 闪存可以进一步包括被配置为存储闪存的片段的测量的表。 闪速存储器还可以包括引导块代码,其包括用于测量的信任核心根(CRTM)。 CRTM可以读取寄存器中的位,以确定闪存中的任何段是否已更新。 CRTM可以进一步获得存储POST BIOS代码的那些片段的表中的测量值,从而节省了测量POST BIOS代码的时间,从而减少了引导时间。

    Secure write blocking circuit and method for preventing unauthorized write access to nonvolatile memory
    167.
    发明授权
    Secure write blocking circuit and method for preventing unauthorized write access to nonvolatile memory 失效
    安全写阻塞电路和防止非易失性存储器的非法写入访问的方法

    公开(公告)号:US06711690B2

    公开(公告)日:2004-03-23

    申请号:US09953775

    申请日:2001-09-17

    CPC classification number: G06F21/79

    Abstract: A secure write blocking circuit and method of operation thereof. The secure write blocking circuit includes enable and disable block input terminals coupled to a blocking circuit. The blocking circuit, such as a set/reset latch in a preferred embodiment, generates a block signal to prevent write access to a nonvolatile memory device, such as flash memory, in response to signals provided to the enable and disable input terminals. The secure write blocking circuit also includes an interrupt generator, coupled to the disable block input terminal, that generates an interrupt signal in response to a signal at the disable input terminal. In a related embodiment the secure write blocking circuit also includes a logic circuit, coupled to the blocking circuit, that receives the block signal and a write enable signal and in response thereto generates a control signal to a write enable input of the nonvolatile memory device.

    Abstract translation: 一种安全的写阻塞电路及其操作方法。 安全写阻断电路包括耦合到阻塞电路的使能和禁止块输入端。 阻塞电路,例如在优选实施例中的设置/复位锁存器,响应于提供给使能和禁止输入端子的信号,产生阻塞信号以防止对非易失性存储器件(例如闪速存储器)的写访问。 安全写阻断电路还包括耦合到禁用块输入端的中断发生器,其响应于禁用输入端的信号而产生中断信号。 在相关实施例中,安全写入分块电路还包括耦合到分块电路的逻辑电路,其接收块信号和写使能信号,并响应于此产生对非易失性存储器件的写使能输入的控制信号。

    Data processing system and method for securing a docking station and its portable PC
    168.
    发明授权
    Data processing system and method for securing a docking station and its portable PC 有权
    用于固定坞站及其便携式PC的数据处理系统和方法

    公开(公告)号:US06609207B1

    公开(公告)日:2003-08-19

    申请号:US09260921

    申请日:1999-03-02

    CPC classification number: G06F21/88 G06F21/31

    Abstract: A data processing system and method including a docking station and a portable computer capable of being coupled to the docking station are disclosed for securing the docking station, the portable computer, and for securing the attachment of the docking station to the portable computer. The portable computer is coupled to the docking station. A disconnection password is established. When the portable computer is disconnected from the docking station, a user is prompted for the disconnection password. The portable computer is disabled in response to a failure to correctly enter the disconnection password, wherein the portable computer is inoperable without a correct entry of the disconnection password. When a portable computer is connected to the docking station, a correct entry of a connection password is required. In response to a failure to correctly enter the connection password, access to the docking station is prohibited. When the docking station is physically removed from its stationary support, correct entry of a relocation password is required. In response to a failure to correctly enter the password, access to the docking station is prohibited.

    Abstract translation: 公开了一种数据处理系统和方法,其包括对接站和能够连接到对接站的便携式计算机,用于固定对接站,便携式计算机,以及用于将对接站的连接固定到便携式计算机。 便携式计算机耦合到对接站。 断开密码建立。 当便携式计算机与对接站断开连接时,提示用户断开连接密码。 响应于无法正确输入断开密码,便携式计算机被禁用,其中便携式计算机在不正确输入断开密码的情况下是不可操作的。 当便携式计算机连接到扩展坞时,需要正确输入连接密码。 响应于无法正确输入连接密码,禁止访问扩展坞。 当对接站从其固定支架物理上移除时,需要正确输入重新定位密码。 为了不正确输入密码,禁止访问扩展坞。

    Computer system having flash memory BIOS which can be accessed remotely while protected mode operating system is running
    169.
    发明授权
    Computer system having flash memory BIOS which can be accessed remotely while protected mode operating system is running 有权
    具有闪存BIOS的计算机系统,其可在受保护模式操作系统运行时远程访问

    公开(公告)号:US06282643B1

    公开(公告)日:2001-08-28

    申请号:US09196563

    申请日:1998-11-20

    CPC classification number: G06F9/4401

    Abstract: Disclosed is a personal computer system which includes a central processing unit (CPU) coupled to a direct access storage device (DASD), a random access memory (RAM), and a LAN controller. A flash memory module is coupled to the CPU and an input/output (IO) bus and includes a basic input output system (BIOS) stored therein. The BIOS is effective for responding to the energization of the computer system by initiating a power on self test (POST). The BIOS is further operative on completion of the POST for transferring a portion of BIOS from the module to the RAM and for transferring control of the of the computer system to the BIOS portion. The portion of BIOS is operative to load a protected mode operating system (OS) into RAM and transfer control to the OS. The system further includes a logic circuit coupled to the flash memory module and the IO bus. A communication subsystem is coupled to the IO bus, the logic circuit and the flash memory for allowing the remote computer to access the BIOS in flash memory while the protected mode OS is running.

    Abstract translation: 公开了一种个人计算机系统,其包括耦合到直接存取存储设备(DASD),随机存取存储器(RAM)和LAN控制器的中央处理单元(CPU)。 闪存模块耦合到CPU和输入/输出(IO)总线,并且包括存储在其中的基本输入输出系统(BIOS)。 BIOS通过启动电源自检(POST)来响应计算机系统的通电。 在完成POST以将BIOS的一部分从模块传送到RAM并用于将计算机系统的控制传送到BIOS部分的同时,BIOS进一步操作。 BIOS的部分操作是将保护模式操作系统(OS)加载到RAM中,并将控制传输到OS。 该系统还包括耦合到闪存模块和IO总线的逻辑电路。 通信子系统耦合到IO总线,逻辑电路和闪存,用于允许远程计算机在保护模式OS正在运行时访问闪存中的BIOS。

    Interactive system support using a system management asic
    170.
    发明授权
    Interactive system support using a system management asic 失效
    交互式系统支持使用系统管理asic

    公开(公告)号:US06249812B1

    公开(公告)日:2001-06-19

    申请号:US09164658

    申请日:1998-10-01

    CPC classification number: H04L41/24 H04L41/0681

    Abstract: A client on a network is provided with auxiliary low power logic, at the network adaptor, that is always active and simulates network traffic (e.g., Ethernet format) normally sent under control of the main client system processor(s). This logic collects client status information and reports to the network manager, irrespective of the system's CPU power level, information and provides for interaction between the user and the administration or network manager to exercise broader control and perform repair and upgrades which would otherwise require a dialog with the user and/or limit repair and reconfiguration of the client system to off-hours activity. The auxiliary logic also can receive and interpret commands from the network that conform to a predefined format.

    Abstract translation: 在网络上的客户机提供辅助低功率逻辑,在网络适配器处,其始终是活动的并且模拟通常在主客户端系统处理器的控制下发送的网络流量(例如,以太网格式)。 该逻辑收集客户端状态信息并向网络管理员报告,而不管系统的CPU功率级别,信息,并提供用户与管理或网络管理者之间的交互,以执行更广泛的控制并执行维修和升级,否则需要对话 用户和/或限制修复和重新配置客户端系统到非工作活动。 辅助逻辑还可以接收和解释来自网络的符合预定格式的命令。

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