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    Image sensor with 3×3 array pixels
    161.
    发明授权
    Image sensor with 3×3 array pixels 有权

    公开(公告)号：US12272702B2

    公开(公告)日：2025-04-08

    申请号：US17546401

    申请日：2021-12-09

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Yujung Choi ,  Junho Seok ,  Munhwan Kim ,  Wonchul Choi

    IPC: H01L27/146 ,  H01L27/148

    Abstract: An image sensor including first and second pixel groups, each of which includes first to ninth pixels arranged to form a 3×3 array is disclosed. The image sensor further includes first to ninth transfer transistors disposed in each of the pixel groups to correspond to the first to ninth pixels, respectively, each of the first to ninth transfer transistors including a transfer gate and a floating diffusion region, a selection transistor disposed in at least one of the fourth to sixth pixels in each of the pixel group, and source follower transistors respectively disposed in at least two pixels of the first to third and seventh to ninth pixels in each of the pixel groups. Source follower gates of the source follower transistors may be connected to the floating diffusion region of each of the first to ninth transfer transistors.

    Semiconductor device
    162.
    发明授权
    Semiconductor device 有权

    公开(公告)号：US12272694B2

    公开(公告)日：2025-04-08

    申请号：US17680907

    申请日：2022-02-25

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Dae Seong Lee ,  Ah Reum Kim ,  Min Su Kim

    IPC: H01L27/118

    Abstract: A semiconductor device includes first, second, and third power rails extending in a first direction on a substrate and sequentially spaced apart in a second direction intersecting the first direction. A fourth power rail extends in the first direction on the substrate between the first and third power rails. A first well of a first conductive type is displaced inside the substrate between the first and third power rails. Cells are continuously displaced between the first and third power rails and share the first well. The first and third power rails are provided with a first voltage, the second power rail is provided with a second voltage different from the first voltage, the fourth power rail is provided with a third voltage different from the first voltage and the second voltage, and the cells are provided with the third voltage from the fourth power rail.

    Semiconductor device
    163.
    发明授权
    Semiconductor device 有权

    公开(公告)号：US12272606B2

    公开(公告)日：2025-04-08

    申请号：US18300983

    申请日：2023-04-14

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Sangmin Yoo ,  Juyoun Kim ,  Hyungjoo Na ,  Bongseok Suh ,  Jooho Jung ,  Euichul Hwang ,  Sungmoon Lee

    IPC: H01L21/8238 ,  H01L21/762 ,  H01L27/118

    Abstract: A semiconductor device is provided. The semiconductor device includes a substrate including an active pattern, a gate electrode extending in a first direction and crossing the active pattern which extends in a second direction, a separation structure crossing the active pattern and extending in the first direction, a first gate dielectric pattern disposed on a side surface of the gate electrode, a second gate dielectric pattern disposed on a side surface of the separation structure, and a gate capping pattern covering a top surface of the gate electrode. A level of a top surface of the separation structure is higher than a level of a top surface of the gate capping pattern.

    Memory device configured to reduce degradation of adjacent word lines and operating method thereof
    165.
    发明授权
    Memory device configured to reduce degradation of adjacent word lines and operating method thereof 有权

    公开(公告)号：US12272403B2

    公开(公告)日：2025-04-08

    申请号：US17955733

    申请日：2022-09-29

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Myoung-Ho Son ,  Doo-Yeun Jung ,  Sung-Kwan Jung

    IPC: G11C16/08 ,  G11C16/16 ,  G11C29/12 ,  G11C16/04

    Abstract: An operating method of a memory device includes: acquiring an address of a first bad word line, the first bad word line included in a plurality of word lines of the memory device; detecting whether word lines adjacent to the first bad word line are bad based on the address of the first bad word line, the word lines adjacent to the first bad word line included in the plurality of word lines; designating a first word line among the word lines adjacent to the first bad word line as a prohibited word line, the first word line being detected as a second bad word line; and sending first data via a second word line among the word lines adjacent to the first bad word line, the second word line being detected as a normal word line.

    Electronic device and method for operating high speed screen of electronic device
    166.
    发明授权
    Electronic device and method for operating high speed screen of electronic device 有权

    公开(公告)号：US12272332B2

    公开(公告)日：2025-04-08

    申请号：US18214560

    申请日：2023-06-27

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Gyehun Jeon ,  Sungyul Choe ,  Seonghoon Choi ,  Nawoong Han ,  Sangheon Kim ,  Yeunwook Lim

    IPC: G09G5/00 ,  G09G5/14

    Abstract: An electronic device may include: a display configured to display an execution screen of an application, and a processor operatively connected to the display. The processor is configured to: execute the application; receive a frequency event from the application; identify predetermined settings based on the application being executed; determine, based on the frequency event and the predetermined settings, a refresh rate of an execution screen of the application; identify, based on state information of the electronic device and the determined refresh rate, information for controlling operation of a high speed screen; and controlling, based on the identified information, the high speed screen related to the execution screen of the application on the display.

    Apparatus and method for waking up a processor
    168.
    发明授权
    Apparatus and method for waking up a processor 有权

    公开(公告)号：US12271245B2

    公开(公告)日：2025-04-08

    申请号：US17321633

    申请日：2021-05-17

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Changryong Heo ,  Kenhyung Park ,  Kiyeon Park ,  Yongyi Kim

    IPC: G06F1/3206 ,  G06F1/16 ,  G06F1/3209 ,  G06F1/3215 ,  G06F1/3231 ,  G06F1/3234 ,  G06F1/3293 ,  G06F3/01 ,  G06F3/16

    Abstract: An apparatus and method for waking up a main processor (MP) in a low power or ultra-low power device preferably includes the MP, and a sub-processor (SP) that utilizes less power than the MP to monitor ambient conditions than the MP, and may be internalized in the MP. The MP and SP can remain in a sleep mode while an interrupt sensor monitors for changes in the ambient environment. A sensor is preferably an interrupt-type sensor, as opposed to polling-type sensors conventionally used to detect ambient changes. The MP and SP may remain in sleep mode, as a low-power or an ultra-low power interrupt sensor operates with the SP being in sleep mode, and awakens the SP via an interrupt indicating a detected change. The SP then wakes the MP after comparing data from the interrupt sensor with values in storage or with another sensor.

    TIMING INFORMATION FOR NETWORK CONTROLLED REPEATERS
    170.
    发明申请
    TIMING INFORMATION FOR NETWORK CONTROLLED REPEATERS 有权

    公开(公告)号：US20250113315A1

    公开(公告)日：2025-04-03

    申请号：US18830382

    申请日：2024-09-10

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Ebrahim MolavianJazi ,  Aristides Papasakellariou ,  Marian Rudolf

    IPC: H04W56/00 ,  H04L27/26 ,  H04W72/231 ,  H04W74/0833

    Abstract: Apparatuses and methods for timing information for network controlled repeaters (NCRs). A method for an NCR includes identifying, by an NCR mobile termination (NCR-MT) entity, first information for a first downlink (DL) frame timing associated with first DL receptions on an NCR control link (C-link) and second information for a second DL frame timing associated with second DL receptions on an NCR backhaul link (BH-link). The method further includes receiving, by the NCR-MT entity on the NCR C-link, a DL signal or channel using the first DL frame timing and receiving, by an NCR forwarding (NCR-Fwd) entity on the NCR BH-link, a first radio frequency signal using the second DL frame timing. The NCR C-link is associated with a first cell on a first carrier frequency. The NCR BH-link is associated with a second cell on a second carrier frequency. The first carrier frequency is different from the second carrier frequency.

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