Abstract:
A graphics display adapter has a row interpolator circuit connected to receive the source pixel data synchronized at a first clock rate and to interpolate groups of pixels of row at a second clock rate. A row interpolated storage device receives and retains interpolated source pixel data of each row at the second clock rate. A column interpolator circuit extracts the interpolated source pixel data at a third clock rate. The column interpolator circuit then interpolates groupings of the interpolated source pixel data at the third clock rate and transmits the destination graphic pixel data for display. The second clock rate maybe equal to the first clock rate or the faster of the first and third clock rates.
Abstract:
A pulse width modulation (PWM) control circuit is applied to a power converter with a charging capacitor. The PWM control circuit includes a PWM signal generator, a first comparator, and a reference voltage modulator. A PWM signal generator generates a PWM signal to control a power switch in the power converter. Two input terminals of the first comparator respectively receive a first reference voltage and a sensing voltage, which is proportional to a primary-side current of a transformer. When the power switch is turned on and the sensing voltage rises to the level of the first reference voltage, the first comparator outputs a first control signal to the PWM signal generator. Then, the PWM signal generator outputs a signal to turn off the power switch. The reference voltage modulator outputs the first reference voltage according to a feedback voltage relative to the output voltage of the power converter.
Abstract:
A transformer includes a bobbin unit, a primary winding, a secondary winding, and a core unit. The bobbin unit has a first winding portion and a second winding portion. The primary winding is wound around the first winding portion of the bobbin unit. The secondary winding is wound around the second winding portion of the bobbin unit, and is coupled electromagnetically to the primary winding. The core unit is mounted to the bobbin unit, and includes a first core part, and a second core part that forms a magnetic circuit path with the first core part. The first core part is movable relative to the second core part from a tunable position to an assembled position for varying a size of an effective magnetic flux region defined between the first core part and the second core part.
Abstract:
Provided are a method, system, and article of manufacture for deploying resources in target server environments. A service description indicates at least one resource and for each resource values for properties for the resource. At least one artifact construct is created for at least one resource indicating the values for the properties for the resource. A determination is made of at least one of a plurality of target server artifact creators. The at least one artifact construct is communicated to the determined at least one target server artifact creator. The at least one target server artifact creator implements resources for a corresponding target server environment. The at least one determined target server artifact creator creates an implementation of the resource for the at least one artifact construct having the values indicated in the artifact construct for execution in the corresponding target server environment.
Abstract:
The present invention provides a miniature surface plasmon resonance sensor chip that produces a plane light source with an organic optoelectronic material by an electro-luminescence method and excites a surface plasmon resonance wave to observe a signal variation at the surface of a sensor chip caused by the combining condition of surface bio-molecules and provide a more accurate miniature sensor in conformity with micro-channel.
Abstract:
The invention discloses a new architecture of multiphase delay-locked loop (DLL) with innovative 3-edge phase detector (3-edge PD), which compares the VCDL's first delay interval and the last delay interval to send an Up pulse or a Dn pulse to adjust the interval among those delay clock phases. The DLL may achieve both wide-range operation and multiple clock phase generation, and is also immune to multi-selection problem.
Abstract:
A hair trimmer includes a handle having a housing including an actuation assembly rotatable relative to the housing, and a blade assembly including a reciprocating blade, a stationary blade and a blade assembly housing, the blade assembly constructed and arranged for being detachably engaged to the actuation assembly in a plane of rotation of the actuation assembly.
Abstract:
NVM arrays include rows and columns of NVM cells comprising a floating gate, dual transistor, inverter storage element. Supply voltage for selected storage elements is turned off during a programming and an erase mode. Isolation transistors for each NVM cell or for each row of NVM cells may be used to control the supply voltage.
Abstract:
The present invention discloses a T-cell immune response inhibitor. The T-cell immune response inhibitor supplied in the present invention comprises a targeted pathogen nucleic acid vaccine and said nucleic acid vaccine's expression protein antigen; or it comprises a targeted pathogen nucleic acid vaccine and said nucleic acid vaccine expression protein antigen's active polypeptide; or it comprises the inactivated pathogen and targeted pathogen nucleic acid vaccine. The T-cell immune response inhibitor in the present invention is able to stimulate the organism to produce the normal specific antibody immune response and to suppress a specific cell's immune response, in particular the Th1 immune response, thus it may be effectively applied to treatment of autoimmune diseases, organ transplants, allergies and control of T-cell levels.