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28 条记录 (耗时 0.023 秒)

    Inverter non-volatile memory cell and array system
    2.
    发明授权
    Inverter non-volatile memory cell and array system 有权
    逆变器非易失性存储单元和阵列系统

    公开(公告)号：US07791950B2

    公开(公告)日：2010-09-07

    申请号：US11748541

    申请日：2007-05-15

    申请人： Bin Wang ,  Shih-Hsin Wang ,  William T. Colleran

    发明人： Bin Wang ,  Shih-Hsin Wang ,  William T. Colleran

    IPC分类号： G11C16/04

    CPC分类号： G11C16/10

    摘要： NVM arrays include rows and columns of NVM cells comprising a floating gate and a four transistor storage element. Supply voltage for selected storage elements is turned off during a programming and an erase mode. Isolation transistors for each NVM cell or for each row of NVM cells may be used to control the supply voltage.

    摘要翻译： NVM阵列包括包括浮动栅极和四晶体管存储元件的NVM单元的行和列。 在编程和擦除模式期间，所选存储元件的电源电压关闭。 可以使用每个NVM单元或每行NVM单元的隔离晶体管来控制电源电压。

    Adaptive radio transceiver
    3.
    发明授权
    Adaptive radio transceiver 有权
    自适应无线电收发器

    公开(公告)号：US07555263B1

    公开(公告)日：2009-06-30

    申请号：US09634552

    申请日：2000-08-08

    申请人： Ahmadreza Rofougaran ,  Maryam Rofougaran ,  Brima Ibrahim ,  Jacob Rael ,  Shahla Khorram ,  Shervin Moloudi ,  Stephen Wu ,  Hooman Darabi ,  William T. Colleran ,  Ed Chien ,  Meng-An Pan

    发明人： Ahmadreza Rofougaran ,  Maryam Rofougaran ,  Brima Ibrahim ,  Jacob Rael ,  Shahla Khorram ,  Shervin Moloudi ,  Stephen Wu ,  Hooman Darabi ,  William T. Colleran ,  Ed Chien ,  Meng-An Pan

    IPC分类号： H04B7/14

    CPC分类号： H04B1/40 ,  H03B21/01 ,  H03H11/1291 ,  H03H21/0001 ,  H03H21/0012 ,  H03H2011/0494 ,  H03J2200/10 ,  H04B1/30 ,  H04B17/104 ,  H04B17/14 ,  H04B17/19

    摘要： An exemplary embodiment of the present invention described and shown in the specification and drawings is a transceiver with a receiver, a transmitter, a local oscillator (LO) generator, a controller, and a self-testing unit. All of these components can be packaged for integration into a single IC including components such as filters and inductors. The controller for adaptive programming and calibration of the receiver, transmitter and LO generator. The self-testing unit generates is used to determine the gain, frequency characteristics, selectivity, noise floor, and distortion behavior of the receiver, transmitter and LO generator. It is emphasized that this abstract is provided to comply with the rules requiring an abstract which will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or the meaning of the claims.

    摘要翻译： 在说明书和附图中描述和示出的本发明的示例性实施例是具有接收器，发射器，本地振荡器（LO）发生器，控制器和自检单元的收发器。 所有这些组件都可以封装以集成到单个IC中，其中包括过滤器和电感器等组件。 用于接收机，发射机和LO发生器的自适应编程和校准的控制器。 自检单元产生用于确定接收机，发射机和LO发生器的增益，频率特性，选择性，本底噪声和失真特性。 要强调的是，该摘要被提供以符合要求摘要的规则，这将允许搜索者或其他读者快速确定技术公开的主题。 提交它的理解是，它不会用于解释或限制权利要求的范围或含义。

    RFID tag assembly methods
    4.
    发明授权
    RFID tag assembly methods 有权
    RFID标签装配方法

    公开(公告)号：US08188927B1

    公开(公告)日：2012-05-29

    申请号：US12399913

    申请日：2009-03-06

    申请人： Ronald Lee Koepp ,  Ronald A. Oliver ,  William T. Colleran ,  Yanjun Ma ,  Jay M. Fassett ,  Vincent C. Moretti

    发明人： Ronald Lee Koepp ,  Ronald A. Oliver ,  William T. Colleran ,  Yanjun Ma ,  Jay M. Fassett ,  Vincent C. Moretti

    IPC分类号： H01Q1/38

    CPC分类号： H01Q23/00 ,  G06K19/07756 ,  H01Q1/2208

    摘要： RFID tags are assembled through affixing an antenna to an integrated circuit (IC) by forming one or more capacitors coupling the antenna and the IC with the dielectric material of the capacitor(s) including a non-conductive covering layer of the IC, a non-conductive covering layer of the antenna such as an oxide layer, and/or an additionally formed dielectric layer. Top and bottom plates of the capacitor(s) are formed by the antenna traces and one or more patches on a top surface of the IC.

    摘要翻译： RFID标签通过将天线和IC的电容器与电容器的电介质材料形成一个或多个电容器组成，该电容器包括IC的非导电覆盖层，非集成电路 天线的导电覆盖层，例如氧化物层，和/或另外形成的电介质层。 电容器的顶板和底板由天线迹线和IC顶表面上的一个或多个贴片形成。

    RFID joint acquisition of time sync and timebase
    6.
    发明授权
    RFID joint acquisition of time sync and timebase 有权
    RFID联合获取时间同步和时基

    公开(公告)号：US07419096B2

    公开(公告)日：2008-09-02

    申请号：US11136948

    申请日：2005-05-24

    申请人： Aanand Esterberg ,  William T. Colleran ,  Scott Anthony Cooper

    发明人： Aanand Esterberg ,  William T. Colleran ,  Scott Anthony Cooper

    IPC分类号： G06K7/08 ,  G06K19/00 ,  G06K19/06 ,  H04Q5/22 ,  G08B13/14

    CPC分类号： G06K7/0008

    摘要： Systems and methods to determine timebase and timing (i.e., time sync) of received signals in RFID systems. Multiple matched filters corresponding to multiple timebases are used to receive the preambles of signals received from RFID tags. The multiple matched filters define a range of expected timebases of the received signals. The matched filter with the maximum output signal peak is used to derive the timebase and timing of the received signal. Viterbi techniques can be used in determining the timebase and timing to incorporate a portion of the data signal in addition to the preamble. Reconfigurable matched filters can be used so that after a preliminary timebase is determined as described above, the matched filters can be reconfigured to define a new smaller range centered about the preliminary timebase. This allows the timebase to be determined with finer resolution when another preamble portion is received.

    摘要翻译： 确定RFID系统中接收信号的时基和定时（即，时间同步）的系统和方法。 对应于多个时基的多个匹配滤波器被用于接收从RFID标签接收的信号的前导码。 多个匹配滤波器定义了接收信号的预期时基的范围。 具有最大输出信号峰值的匹配滤波器用于导出接收信号的时基和定时。 除了前导码之外，维特比技术可用于确定并入数据信号的一部分的时基和定时。 可以使用可重配置匹配滤波器，使得在如上所述确定初步时基之后，可以重新配置匹配滤波器以定义以初步时基为中心的新的较小范围。 这允许当接收另一个前同步码部分时，以更精细的分辨率确定时基。

    Inverter non-volatile memory cell and array system
    7.
    发明授权
    Inverter non-volatile memory cell and array system 有权
    逆变器非易失性存储单元和阵列系统

    公开(公告)号：US07257033B2

    公开(公告)日：2007-08-14

    申请号：US11084214

    申请日：2005-03-17

    申请人： Bin Wang ,  Chih-Hsin Wang ,  William T. Colleran

    发明人： Bin Wang ,  Chih-Hsin Wang ,  William T. Colleran

    IPC分类号： G11C16/04

    CPC分类号： G11C16/10

    摘要： NVM arrays include rows and columns of NVM cells comprising a floating gate, dual transistor, inverter storage element. Supply voltage for selected storage elements is turned off during a programming and an erase mode. Isolation transistors for each NVM cell or for each row of NVM cells may be used to control the supply voltage.

    摘要翻译： NVM阵列包括包括浮动栅极，双晶体管，逆变器存储元件的NVM单元的行和列。 在编程和擦除模式期间，所选存储元件的电源电压关闭。 可以使用每个NVM单元或每行NVM单元的隔离晶体管来控制电源电压。