公开(公告)号：US20200150887A1

公开(公告)日：2020-05-14

申请号：US16297737

申请日：2019-03-11

Applicant: Silicon Motion Inc.

Inventor： An-Nan Chang

IPC: G06F3/06 ,  G06F1/30 ,  G06F16/17

Abstract: A method and apparatus for performing mapping information management regarding a RAID are provided. The method includes: writing data into a data region of the RAID in a redirect-on-write (ROW) manner, and recording mapping information between logical addresses of the data and protected-access-unit addresses (p-addresses) of protected access units in the data region into a logical-address-to-p-address (L2p) table within a table region of the RAID; when partial data of the data is updated, maintaining an updating list including a set of L2p table entries for the partial data in a RAM, and maintaining a recovery log corresponding to the updating list in a log region of the RAID, for power failure recovery; and according to the updating list, detecting whether a number of same-location L2p table entries in the set of L2p table entries reaches a predetermined threshold, to selectively update the L2p table with the same-location L2p table entries.

公开(公告)号：US10606744B2

公开(公告)日：2020-03-31

申请号：US15859738

申请日：2018-01-02

Applicant: Silicon Motion Inc.

Inventor： Ting-Fong Hsu ,  Po-Tsang Chen

IPC: G06F12/02

Abstract: The present invention provides a method for accessing a flash memory module, wherein the method comprises: building a physical block recording table corresponding to a logical address to physical address (L2P) mapping table, wherein the physical block recording table records at least one block whose physical address is recorded in the L2P mapping table; and when a specific block within the flash memory module is under a garbage collection operation, for a data page of the specific block whose logical address is within the L2P mapping table, referring to the physical block recording table to determine if reading the L2P mapping table from the flash memory module or not, for determining the data page to be valid or invalid.

公开(公告)号：US20200091939A1

公开(公告)日：2020-03-19

申请号：US16691552

申请日：2019-11-21

Applicant: Silicon Motion, Inc.

Inventor： Shiuan-Hao Kuo

IPC: H03M13/29 ,  G06F11/10 ,  H03M13/00 ,  H03M13/11

Abstract: An encoding method includes: processing a plurality of data blocks to generate a plurality of partial parity blocks, wherein the partial parity blocks includes a first portion and a second portion; using a first computing circuit to generate a first calculating result according to the second portion of the partial parity blocks; using the first calculating result to adjust the first portion of the partial parity blocks; performing circulant convolution operations upon the adjusted first portion to generate a first portion of parity blocks; and using a second computing circuit to generate a second portion of the parity blocks according to at least the first portion of parity blocks; wherein the first portion of the parity blocks and the second portion of the parity blocks serve as a plurality of parity blocks generated in response to encoding the data blocks.

公开(公告)号：US20200089608A1

公开(公告)日：2020-03-19

申请号：US16445136

申请日：2019-06-18

Applicant: Silicon Motion Inc.

Inventor： Ting-Heng Chou ,  Jian-Wei Sun

IPC: G06F12/02 ,  G06F12/1009

Abstract: A high efficiency garbage collection method, an associated data storage device and a controller thereof are provided. The high efficiency garbage collection method includes: starting and executing a garbage collection procedure; determining whether a Trim command from a host device is received; in response to the Trim command being received, determining whether target data of the Trim command is stored in a source block of the garbage collection procedure; in response to the target data being stored in the source block, determining whether the target data stored in the source block has been copied to a destination block of the garbage collection procedure; and in response to the target data stored in the source block having been copied to the destination block, changing at least one physical address of the target data of the Trim command to a Trim tag in a logical-to-physical address mapping table.

公开(公告)号：US10592412B2

公开(公告)日：2020-03-17

申请号：US16101742

申请日：2018-08-13

Applicant: Silicon Motion, Inc.

Inventor： Kuan-Yu Ke

IPC: G06F3/06 ,  G06F12/02

Abstract: A data storage device for dynamically executing the garbage-collection process is provided which includes a flash memory and a controller. The flash memory includes a plurality of blocks wherein each of the blocks includes a plurality of pages. The controller is coupled to the flash memory and is utilized to execute the garbage-collection process on the flash memory according to a number of at least one spare block in the flash memory and the number of non-spare blocks corresponding to different ratios of effective pages. The garbage-collection process is utilized for merging at least two non-spare blocks to release at least one spare block.

公开(公告)号：US10592157B2

公开(公告)日：2020-03-17

申请号：US16161900

申请日：2018-10-16

Applicant: Silicon Motion, Inc.

Inventor： Wen-Sheng Lin ,  Yu-Da Chen

IPC: G06F3/06

Abstract: A data storage device includes a memory device and a controller. The memory device includes multiple memory blocks. The memory blocks include single-level cell blocks and multiple-level cell blocks. The controller is coupled to the memory device. When the controller executes a predetermined procedure to write data stored in the single-level cell blocks into the multiple-level cell blocks, the controller is configured to determine whether a valid page count corresponding to each single-level cell block is greater than a threshold, and when the valid page count corresponding to more than one single-level cell block is greater than the threshold, the controller is configured to execute a first merge procedure to directly write the data stored in the single-level cell blocks with the valid page count greater than the threshold into one or more of the multiple-level cell blocks.

公开(公告)号：US20200073595A1

公开(公告)日：2020-03-05

申请号：US16120285

申请日：2018-09-02

Applicant: Silicon Motion Inc.

Inventor： Hsu-Ping Ou ,  Wei-Yi Hsiao

IPC: G06F3/06

Abstract: A method of a flash memory controller connected to a flash memory includes: receiving a data unit from the host via a bust of the host; controlling the flash memory to load a full page data from the flash memory into a buffer of the flash memory; and writing the data unit into the buffer to update or replace a portion data of the full page data stored in the buffer, to control the flash memory write the full page data which has been updated by the data unit from the buffer into the flash memory.

公开(公告)号：US20200065177A1

公开(公告)日：2020-02-27

申请号：US16458175

申请日：2019-06-30

Applicant: Silicon Motion, Inc.

Inventor： AN-PANG LI

IPC: G06F11/07 ,  G06F11/20 ,  G06F13/16 ,  G06F9/32

Abstract: A multi-processor system with a distributed mailbox architecture and a processor error checking method thereof are provided. The multi-processor system comprises a plurality of processors, each of the processors is correspondingly configured with an exclusive mailbox and an exclusive channel, and the processor error checking method comprises the following steps. When a first processor of the processors needs to communicate with a second processor, the first processor writes the data into the exclusive mailbox of the second processor through a public bus; and when the exclusive mailbox of the second processor has receiving the data, the exclusive mailbox of the second processor starts timing, and until the timing result exceeds a threshold value, the exclusive mailbox of the second processor sends a timeout signal to the second processor, and after receiving the timeout signal, the second processor resets the first processor.

公开(公告)号：US20200057572A1

公开(公告)日：2020-02-20

申请号：US16412452

申请日：2019-05-15

Applicant: Silicon Motion Inc.

Inventor： Wen-Sheng Lin

IPC: G06F3/06 ,  G06F1/20 ,  G06F12/02 ,  H03M13/37 ,  G11C16/08

Abstract: The present invention provides a flash memory controller, wherein the flash memory controller includes a read-only memory, a microprocessor and a decoder, wherein the read-only memory is configured to store a program code, the microprocessor is configured to execute the program code to access a flash memory module, and the decoder includes a hard decoding function and a soft decoding function. In the operations of the flash memory controller, when the flash memory controller and the flash memory module are powered-on, the flash memory controller reads data from a specific block of the flash memory module, and the decoder determines if disabling the soft decoding function or not according to a status of the specific block or a status of the data.

公开(公告)号：US20200034080A1

公开(公告)日：2020-01-30

申请号：US16255925

申请日：2019-01-24

Applicant: Silicon Motion, Inc.

Inventor： Liang-Cheng CHEN

IPC: G06F3/06 ,  G11C29/44

Abstract: Multi-channel accessing of non-volatile memory. A controller uses three kinds of tables to manage cross-channel accessing areas and, accordingly, to access the non-volatile memory through multiple channels. Each cross-channel accessing area includes M storage units, where M is an integer greater than 1. For each cross-channel accessing area, the first table marks whether there is a need for storage unit substitution and points to substitution information. The substitution information is stored in the second table and the third table. For each cross-channel accessing area marked in the first table, the second table stores M bits corresponding to M storage units of the marked cross-channel accessing area for substitution indication, and related substitute storage unit indication is stored in the third table.