-
公开(公告)号:US10249660B2
公开(公告)日:2019-04-02
申请号:US14898054
申请日:2014-06-09
Applicant: Rambus Inc.
Inventor: Michael Guidash , Thomas Vogelsang
IPC: H01L27/146 , H04N5/347 , H04N5/3745 , H04N5/378
Abstract: In a pixel array within an integrated-circuit image sensor, a pixel (870) includes a photodetector (260) and floating diffusion (262) formed within a substrate. First (881) and second (883) gate elements are disposed adjacent one another over a region (885) of the substrate between the photodetector and the floating diffusion and coupled respectively to a row line (TGr) that extends in a row direction within the pixel array and a column line (TGc) that extends in a column direction within the pixel array.
-
公开(公告)号:US20190045149A1
公开(公告)日:2019-02-07
申请号:US16051344
申请日:2018-07-31
Applicant: Rambus Inc.
Inventor: Michael Guidash , Jay Endsley , John Ladd , Thomas Vogelsang , Craig M. Smith
CPC classification number: H04N5/374 , H01L27/14643 , H04N5/35554 , H04N5/3577 , H04N5/365 , H04N5/3765 , H04N5/378
Abstract: Photocharge is accumulated within an image sensor pixel array during a first exposure interval. At conclusion of the first exposure interval, accumulated photocharge is discarded from a first subset of the pixels to emulate absence of incident light with respect to those pixels. After discarding accumulated photocharge from the first subset of the pixels, first and second readout signals are generated, the first readout signals corresponding to respective pixels not included in the first subset and indicative of photocharge accumulated therein, and the second readout signals corresponding to respective pixels included in the first subset.
-
公开(公告)号:US10178329B2
公开(公告)日:2019-01-08
申请号:US15312778
申请日:2015-05-21
Applicant: Rambus Inc.
Inventor: Thomas Vogelsang , Craig M. Smith
IPC: H04N5/355 , H04N5/347 , H04N5/3745 , H04N5/378 , H04N9/04 , G06T7/246 , H04N5/232 , H04N5/235 , H04N5/343
Abstract: In an integrated-circuit image sensor having a pixel array, a first subframe readout policy is selected from among a plurality of subframe readout policies, each of the subframe readout policies specifying a first number of subframes of image data to be readout from the pixel array for each output image frame and respective exposure durations for each of the first number of subframes of image data, wherein a shortest one of the exposure durations is uniform for each of the subframe readout policies. Each of the first number of subframes of image data is read out from the pixel array following the respective exposure durations thereof while applying a respective analog readout gain. The analog readout gain applied during readout of at least a first subframe of the first number of subframes is scaled according to a ratio of the shortest one of the exposure durations to the exposure duration of the first subframe.
-
公开(公告)号:US10165209B2
公开(公告)日:2018-12-25
申请号:US15328207
申请日:2015-07-23
Applicant: Rambus Inc.
Inventor: John Ladd , Michael Guidash , Craig M. Smith , Thomas Vogelsang , Jay Endsley , Michael T. Ching , James E. Harris
Abstract: A sequence of control voltage levels are applied to a control signal line capacitively coupled to a floating diffusion node of a pixel to sequentially adjust a voltage level of the floating diffusion node. A pixel output signal representative of the voltage level of the floating diffusion node is compared with a reference voltage to identify a first control voltage level of the sequence of control voltage levels for which the voltage level of the floating diffusion node exceeds the reference voltage.
-
公开(公告)号:US10136090B2
公开(公告)日:2018-11-20
申请号:US14772311
申请日:2014-03-14
Applicant: Rambus Inc.
Inventor: Thomas Vogelsang , Michael Guidash , Song Xue , Maxim Smirnov , Craig M. Smith , Jay Endsley , James E. Harris
IPC: H04N5/225 , H04N5/3745 , H01L27/146 , H04N5/347 , H04N5/376
Abstract: An image sensor architecture with multi-bit sampling is implemented within an image sensor system. A pixel signal produced in response to light incident upon a photosensitive element is converted to a multiple-bit digital value representative of the pixel signal. If the pixel signal exceeds a sampling threshold, the photosensitive element is reset. During an image capture period, digital values associated with pixel signals that exceed a sampling threshold are accumulated into image data.
-
公开(公告)号:US10104318B2
公开(公告)日:2018-10-16
申请号:US15100976
申请日:2014-12-03
Applicant: Rambus Inc.
Inventor: Craig M. Smith , Frank Armstrong , Jay Endsley , Thomas Vogelsang , James E. Harris , John Ladd , Michael Guidash
Abstract: A pixel array within an integrated-circuit image sensor is exposed to light representative of a scene during a first frame interval and then oversampled a first number of times within the first frame interval to generate a corresponding first number of frames of image data from which a first output image may be constructed. One or more of the first number of frames of image data are evaluated to determine whether a range of luminances in the scene warrants adjustment of an oversampling factor from the first number to a second number, if so, the oversampling factor is adjusted such that the pixel array is oversampled the second number of times within a second frame interval to generate a corresponding second number of frames of image data from which a second output image may be constructed.
-
公开(公告)号:US09894304B1
公开(公告)日:2018-02-13
申请号:US14827838
申请日:2015-08-17
Applicant: Rambus Inc.
Inventor: Craig M. Smith , Michael Guidash , Thomas Vogelsang , Jay Endsley , Michael T. Ching
CPC classification number: G06T3/4015 , H04N5/35554 , H04N5/35581 , H04N5/378 , H04N9/045 , H04N2209/046
Abstract: Photocharge is integrated within a first plurality of pixels of an integrated-circuit image sensor during a first exposure interval. A read-out signal is output from each pixel of the first plurality of pixels upon conclusion of the first exposure interval, each read-out signal indicating a respective level of photocharge integrated within the corresponding pixel during the first exposure interval. Photocharge is also integrated within a second plurality of pixels during a second exposure interval that transpires concurrently with the first exposure interval and has a duration not more than half the duration of the first exposure interval. A read-out signal is output from each pixel of the second plurality of pixels at least twice with respect to the second exposure interval, with each such read-out signal indicating a respective level of photocharge integrated within the corresponding pixel during at least a portion of the second exposure interval.
-
公开(公告)号:US09875787B2
公开(公告)日:2018-01-23
申请号:US15352366
申请日:2016-11-15
Applicant: Rambus Inc.
Inventor: Frederick A. Ware , John Eric Linstadt , Thomas Vogelsang
IPC: G11C7/10 , G11C11/4093 , G11C11/4094 , G11C11/4076
CPC classification number: G11C11/4093 , G11C11/4076 , G11C11/4094 , G11C11/4097
Abstract: A memory stack comprises at least two memory components. The memory components have a first data link interface and are to transmit signals on a data link coupled to the first data link interface at a first voltage level. A buffer component has a second data link interface coupled to the data link. The buffer component is to receive signals on the second data link interface at the first voltage level. A level shifting latch produces a second voltage level in response to receiving the signals at the second data link interface, where the second voltage level is higher than the first voltage level.
-
公开(公告)号:US09826176B1
公开(公告)日:2017-11-21
申请号:US14686697
申请日:2015-04-14
Applicant: Rambus Inc.
Inventor: Thomas Vogelsang
IPC: H04N5/353 , H04N5/355 , H04N5/378 , H04N5/3745
CPC classification number: H04N5/3535 , H04N5/355 , H04N5/35536 , H04N5/3745 , H04N5/378
Abstract: An image sensor generates first digital samples and second digital samples during respective first and second sampling intervals, the first digital samples including at least one digital sample of each pixel of a first plurality of pixels, and the second digital samples including at least one digital sample of each pixel of a second plurality of pixels. A sum of the first digital samples is accumulated within a first counter as the first sampling interval transpires, and a sum of the second digital samples is accumulated within the first counter as the second sampling interval transpires.
-
公开(公告)号:US09691504B2
公开(公告)日:2017-06-27
申请号:US14353401
申请日:2012-10-19
Applicant: Rambus Inc.
Inventor: Ely Tsern , Frederick A Ware , Suresh Rajan , Thomas Vogelsang
CPC classification number: G06F11/1008 , G11C5/04 , G11C29/24 , G11C29/50016 , G11C2029/4402 , G11C2211/4061
Abstract: A method of operation in an integrated circuit (IC) memory device is disclosed. The method includes refreshing a first group of storage rows in the IC memory device at a first refresh rate. A retention time for each of the rows is tested. The testing for a given row under test includes refreshing at a second refresh rate that is slower than the first refresh rate. The testing is interruptible based on an access request for data stored in the given row under test.
-
-
-
-
-
-
-
-
-