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    HIGH DYNAMIC-RANGE IMAGE SENSOR
    5.
    发明申请
    HIGH DYNAMIC-RANGE IMAGE SENSOR 审中-公开
    高动态范围图像传感器

    公开(公告)号：US20160323524A1

    公开(公告)日：2016-11-03

    申请号：US15100976

    申请日：2014-12-03

    申请人： RAMBUS INC.

    发明人： Craig M. Smith ,  Frank Armstrong ,  Jay Endsley ,  Thomas Vogelsang ,  James E. Harris ,  John Ladd ,  Michael Guidash

    IPC分类号： H04N5/355 ,  H04N5/232 ,  H04N5/3745 ,  H04N5/347 ,  H04N5/361 ,  H04N9/04 ,  H04N5/235

    CPC分类号： H04N5/355 ,  H04N5/23245 ,  H04N5/2355 ,  H04N5/347 ,  H04N5/35536 ,  H04N5/361 ,  H04N5/37457 ,  H04N9/045

    摘要： A pixel array within an integrated-circuit image sensor is exposed to light representative of a scene during a first frame interval and then oversampled a first number of times within the first frame interval to generate a corresponding first number of frames of image data from which a first output image may be constructed. One or more of the first number of frames of image data are evaluated to determine whether a range of luminances in the scene warrants adjustment of an oversampling factor from the first number to a second number, if so, the oversampling factor is adjusted such that the pixel array is oversampled the second number of times within a second frame interval to generate a corresponding second number of frames of image data from which a second output image may be constructed.

    摘要翻译： 集成电路图像传感器内的像素阵列在第一帧间隔期间暴露于表示场景的光，然后在第一帧间隔内对第一次数进行过采样，以生成对应的第一数量的图像数据帧， 可以构造第一输出图像。 对图像数据的第一数量帧中的一个或多个进行评估，以确定场景中的亮度范围是否需要将过采样因子从第一数量调整到第二数量，如果是，则调整过采样因子，使得 像素阵列在第二帧间隔内对第二次数进行过采样，以生成可以从其构造第二输出图像的图像数据的对应的第二数量帧。

    Reducing memory refresh exit time
    6.
    发明授权
    Reducing memory refresh exit time 有权
    减少内存刷新退出时间

    公开(公告)号：US09007862B2

    公开(公告)日：2015-04-14

    申请号：US13938130

    申请日：2013-07-09

    申请人： Rambus Inc.

    发明人： Frederick A. Ware ,  Brent Haukness ,  Ian P. Shaeffer ,  James E. Harris

    IPC分类号： G11C7/00 ,  G11C11/406 ,  G11C7/10

    CPC分类号： G11C7/00 ,  G11C7/1009 ,  G11C11/40611 ,  G11C11/40615 ,  G11C11/40622

    摘要： Components of a memory system, such as a memory controller and a memory device, that reduce delay in exiting self-refresh mode by controlling the refresh timing of the memory device. The memory device includes a memory core. An interface circuit of the memory device receives an external refresh signal indicating an intermittent refresh event. A refresh circuit of the memory device generates an internal refresh signal indicating an internal refresh event of the memory device. A refresh control circuit of the memory device performs a refresh operation on a portion of the memory core responsive to the internal refresh event, at a time relative to the intermittent refresh event indicated by the external refresh signal.

    摘要翻译： 诸如存储器控制器和存储器设备的存储器系统的组件通过控制存储器件的刷新定时来减少退出自刷新模式的延迟。 存储器件包括存储器核。 存储装置的接口电路接收指示间歇刷新事件的外部刷新信号。 存储器件的刷新电路产生指示存储器件的内部刷新事件的内部刷新信号。 存储器件的刷新控制电路响应于内部刷新事件，在相对于由外部刷新信号指示的间歇刷新事件的时间，对存储器核心的一部分执行刷新操作。

    Oversampled image sensor with conditional pixel readout
    7.
    发明授权
    Oversampled image sensor with conditional pixel readout 有权
    具有条件像素读数的过采样图像传感器

    公开(公告)号：US09001251B2

    公开(公告)日：2015-04-07

    申请号：US14482065

    申请日：2014-09-10

    申请人： Rambus Inc.

    发明人： Craig M. Smith ,  Michael Guidash ,  Jay Endsley ,  Thomas Vogelsang ,  James E. Harris

    IPC分类号： H04N3/14 ,  H04N5/335 ,  H04N5/378 ,  H01L31/062 ,  H01L31/113

    CPC分类号： H04N5/3559 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/14641 ,  H01L27/14643 ,  H01L27/14645 ,  H04N5/347 ,  H04N5/355 ,  H04N5/3741 ,  H04N5/37455 ,  H04N5/378

    摘要： In a pixel array within an integrated-circuit image sensor, each of a plurality of pixels is evaluated to determine whether charge integrated within the pixel in response to incident light exceeds a first threshold. N-bit digital samples corresponding to the charge integrated within at least a subset of the plurality of pixels are generated, and then applied to a lookup table to retrieve respective M-bit digital values (M being less than N), wherein a stepwise range of charge integration levels represented by possible states of the M-bit digital values extends upward from a starting charge integration level that is determined based on the first threshold.

    摘要翻译： 在集成电路图像传感器内的像素阵列中，评估多个像素中的每一个以确定响应于入射光在像素内积分的电荷是否超过第一阈值。 产生与集成在多个像素的至少一个子集中的电荷相对应的N位数字样本，然后将其应用于查找表以检索相应的M位数字值（M小于N），其中步长范围 由M位数字值的可能状态表示的电荷积分电平从基于第一阈值确定的起始电荷积分电平向上延伸。

    CONDITIONAL-RESET, TEMPORALLY OVERSAMPLED IMAGE SENSOR
    8.
    发明申请
    CONDITIONAL-RESET, TEMPORALLY OVERSAMPLED IMAGE SENSOR 有权
    条件复位，瞬时超压图像传感器

    公开(公告)号：US20140293102A1

    公开(公告)日：2014-10-02

    申请号：US14355799

    申请日：2012-11-08

    申请人： RAMBUS INC.

    发明人： Thomas Vogelsang ,  David Geoffrey Stork ,  John Eric Lindstadt ,  James E. Harris

    IPC分类号： H04N5/235

    CPC分类号： H04N5/235 ,  H04N1/00769 ,  H04N5/2355 ,  H04N5/3355 ,  H04N5/3535 ,  H04N5/355 ,  H04N5/35536 ,  H04N5/3745

    摘要： Pixel circuits in an image sensor are sampled repetitively during an image frame period. At each sampling, a signal indicative of the photocharge integrated by a pixel circuit since last reset is compared to a threshold. If the integrated photocharge signal has not reached the threshold, the pixel circuit is permitted to continue integrating photocharge. If the integrated photocharge signal has reached the threshold, the pixel circuit is reset to remove integrated photocharge and photocharge integration for that pixel circuit is restarted. A corresponding pixel circuit value is recorded for the reset pixel circuit.

    摘要翻译： 图像传感器中的像素电路在图像帧周期期间重复采样。 在每次采样时，将与上一次复位后的像素电路集成的光电荷的信号与阈值进行比较。 如果集成光电荷信号尚未达到阈值，则允许像素电路继续积分光电荷。 如果积分的光电荷信号已经达到阈值，则像素电路被复位以去除集成的光电荷并且该像素电路的光电荷积分被重新启动。 记录复位像素电路的对应像素电路值。

    Memory Systems and Methods for Improved Power Management
    9.
    发明公开
    Memory Systems and Methods for Improved Power Management 审中-公开

    公开(公告)号：US20230360695A1

    公开(公告)日：2023-11-09

    申请号：US18203591

    申请日：2023-05-30

    申请人： Rambus Inc.

    发明人： Frederick A. Ware ,  James E. Harris

    IPC分类号： G11C11/4093 ,  G11C5/04 ,  G11C5/06 ,  G11C8/12 ,  G11C7/22

    CPC分类号： G11C11/4093 ,  G11C5/04 ,  G11C5/063 ,  G11C8/12 ,  G11C7/22

    摘要： A memory module with multiple memory devices includes a buffer system that manages communication between a memory controller and the memory devices. Each memory device supports an access mode and a low-power mode, the latter used to save power for devices that are not immediately needed. The module provides granular power management using a chip-select decoder that decodes chip-select signals from the memory controller into power-state signals that determine which of the memory devices are in which of the modes. Devices can thus be brought out of the low-power mode in relatively small numbers, as needed, to limit power consumption.