摘要:
A MOS voltage trim amplifier which can multiply an input voltage with a quantized value to generate an output voltage. The MOS trim amplifier comprises a MOS op-amp, a multiplying feedback network, a gate-bias network and startup circuit. The MOS op-amp has a noninverting terminal for receiving the input and an inverting terminal for receiving the feedback network. The multiplying feedback network uses two MOSFETs as feedback elements to provide the voltage ratio for the multiplication. The gate-bias network provides a reference voltage which is a fraction of the input voltage through a MOSFET voltage divider to the feedback MOSFETs. Current mirrors are employed in the gate-bias network to provide a constant stable current through the MOSFET voltage divider to avoid loading the input. The startup circuit generates a bias current to the two feedback MOSFETs to drive them out of their natural off state.
摘要:
In one embodiment, the present invention provides a circuit that includes a core circuit and a control circuit coupled to the core circuit. The control circuit reduces a leakage current in the core circuit when the core circuit is in a Sleep mode. The control circuit maintains a logic state of the core circuit when the core circuit is in a Drowsy mode.
摘要:
A speed governor for an integrated circuit which prevents the operation of the integrated circuit above a selected frequency. The speed governor generates a frequency reference and compares the frequency reference to the frequency of the external clock signal that clocks the integrated circuit. As a result of the comparison, if the frequency of the input clock signal is greater than the frequency reference then operation of the integrated circuit is disrupted.
摘要:
A high voltage CMOS n-well switch with guarding against reverse junction breakdown, as well as gate-aided breakdown. The CMOS switch of the present invention comprises two pairs of cascoding p-channel MOSFET loads, two pairs of cascoding n-channel MOSFET drivers and an inverter for input. One device in each pair of MOSFETs is used as a guard against gate-aided breakdown. The p-channel MOSFETs have independent n-wells so that the guard devices have their n-wells independently biased without being pulled by the n-wells of the load devices. The inverter is used to provide complementary inputs to the switch. By having independent n-wells, the breakdown voltage of the switch is raised above p+/n-well reverse breakdown voltage.
摘要:
A MOS voltage trim amplifier which can multiply an input voltage with a quantized value to generate an output voltage. The MOS trim amplifier comprises a MOS op-amp, a multiplying feedback network, a gate-bias network and startup circuit. The MOS op-amp has a noninverting terminal for receiving the input and an inverting terminal for receiving the feedback network. The multiplying feed back network uses two MOSFETs as feedback elements to provide the voltage ratio for the multiplication. The gate-bias network provides a reference voltage which is a fraction of the input voltage through a MOSFET voltage divider to the feedback MOSFETs. Current mirrors are employed in the gate-bias network to provide a constant stable current through the MOSFET voltage divider to avoid loading the input. The startup circuit generates a bias current to the two feedback MOSFETs to drive them out of their natural off state.