Test method for power integrated devices
    13.
    发明授权
    Test method for power integrated devices 失效
    电力集成设备的测试方法

    公开(公告)号:US5801536A

    公开(公告)日:1998-09-01

    申请号:US574616

    申请日:1995-12-19

    CPC classification number: G01R31/2853

    Abstract: A method of checking an integrity of an electric power connection between a contact pad of an integrated circuit and a corresponding contact pin in an electronic power device, wherein the electronic power device includes at least one final power stage powered from the respective discrete contact pad connected by means of the electric power connection to the respective contact pin. The method of checking is accomplished by providing a resistive connection between two contact pads of the electronic power device bringing the at least one final power stage, powered from the first contact pad, to a conduction state, measuring the potential difference between the two contact pins connected to the two contact pads, and comparing the potential difference with a predetermined nominal potential difference.

    Abstract translation: 一种检查集成电路的接触焊盘和电子功率器件中的对应接触针之间的电力连接的完整性的方法,其中所述电子功率器件包括至少一个由相应的离散接触焊盘连接的最终功率级 通过与相应的接触针的电力连接。 检查方法是通过在电子功率器件的两个接触焊盘之间提供电阻连接来实现的,该电阻连接引线使得从第一接触焊盘供电的至少一个最终功率级达到导通状态,测量两个接触引脚之间的电位差 连接到两个接触焊盘,并将电位差与预定的标称电位差进行比较。

    Integrated generator of a slow voltage ramp
    15.
    发明授权
    Integrated generator of a slow voltage ramp 有权
    集成发电机的缓慢电压斜坡

    公开(公告)号:US06384645B2

    公开(公告)日:2002-05-07

    申请号:US09824534

    申请日:2001-04-02

    CPC classification number: H03K4/06 H03K4/023

    Abstract: An integrated circuit for producing a small slope voltage ramp includes a circuit for generating a periodic triangular current signal, and a circuit for generating, at the beginning of each period of the triangular signal, a pulse of a certain duration which is much smaller than the period of the triangular signal. A control loop is input at a node with the triangular current signal and produces the desired slow voltage ramp on the output node. The control loop includes a first hold circuit coupled to the input node via a first switch controlled by the pulse, and a transconductance operational amplifier, whose inputs are respectively coupled to the input node and to the output node. Also, the control loop includes a second hold circuit coupled to the output of the operational transconductance amplifier via a second switch controlled in a complementary manner with respect to the first switch. A resistor of a much smaller value than the ratio between the period of the triangular signal and the capacitance of the storage capacitor of the first hold circuit is connected between the output of the second hold circuit and the input node.

    Abstract translation: 用于产生小斜坡电压斜坡的集成电路包括用于产生周期性三角形电流信号的电路,以及用于在三角形信号的每个周期的开始处产生一定长度的脉冲,该脉冲远小于 三角形信号的周期。 在具有三角形电流信号的节点处输入控制回路,并在输出节点上产生所需的慢速电压斜坡。 控制回路包括通过由脉冲控制的第一开关耦合到输入节点的第一保持电路和跨导运算放大器,其输入分别耦合到输入节点和输出节点。 而且,控制回路包括第二保持电路,该第二保持电路通过相对于第一开关以互补方式控制的第二开关耦合到运算跨导放大器的输出端。 在第二保持电路的输出和输入节点之间连接有比三角形信号的周期和第一保持电路的存储电容的电容之间的比值小得多的电阻。

    Circuit for ensuring full saturation of amplifiers of a single input configured bridge amplifier
    16.
    发明授权
    Circuit for ensuring full saturation of amplifiers of a single input configured bridge amplifier 有权
    用于确保单输入配置桥式放大器的放大器完全饱和的电路

    公开(公告)号:US06307434B1

    公开(公告)日:2001-10-23

    申请号:US09461168

    申请日:1999-12-14

    CPC classification number: H03F3/3081

    Abstract: A circuit for ensuring a complete saturation of both operational amplifiers of a single-input bridge amplifier is provided. A voltage divider is connected between the inverting inputs of the two amplifiers and a saturation current signal is injected on the intermediate node of the voltage divider. Such a saturation current signal is obtained through dedicated sensing devices of the state of saturation reached by the transistors of the output stages of both amplifiers of the single-input bridge amplifier.

    Abstract translation: 提供了用于确保单输入桥式放大器的两个运算放大器完全饱和的电路。 分压器连接在两个放大器的反相输入端之间,饱和电流信号被注入到分压器的中间节点上。 这种饱和电流信号通过专用感测装置获得,该感测装置是由单输入桥式放大器的两个放大器的输出级的晶体管达到的饱和状态。

    Current generator circuit having a wide frequency response
    17.
    发明授权
    Current generator circuit having a wide frequency response 失效
    电流发生器电路具有较宽的频率响应

    公开(公告)号:US6072359A

    公开(公告)日:2000-06-06

    申请号:US108081

    申请日:1998-06-30

    CPC classification number: H03F3/345 G05F3/267

    Abstract: A current generator circuit with controllable frequency response has at least one current mirror formed of MOS transistors, being powered through a terminal held at a constant voltage, having an input leg through which a reference current (I1) is driven by a first current generator (G1), and having an output leg for generating, on an output terminal (OUT) of the mirror, a mirrored current (I.sub.out) which is proportional to the reference current (I1). The input leg includes at least a first transistor (M1) which is diode-connected and has a control terminal (Ga1) coupled to a corresponding terminal (Ga2) of a second transistor (M2) included in the output leg. In accordance with the invention, the mirror circuit also has an impedance matching circuit connected across the control terminals (Ga1 and Ga2) of the first and second transistors and configured to hold the same voltage value at both terminals (Ga1 and Ga2). The impedance matching circuit has an adjustable output impedance, specifically lower in value than the value to be had without this circuit. It functions to regulate the impedance on the control node (Ga2) of the second transistor (M2). The invention is equally applicable to N-channel and P-channel MOS transistors. Advantageously, the reference current can be varied by an external signal which is a function of the output signal, to provide feedback regulating features.

    Abstract translation: 具有可控频率响应的电流发生器电路具有由MOS晶体管形成的至少一个电流镜,其通过保持在恒定电压的端子供电,具有输入支路,参考电流(I1)由第一电流发生器 G1),并且具有用于在镜的输出端(OUT)上产生与参考电流(I1)成比例的镜像电流(Iout)的输出支路。 输入支路至少包括二极管连接的第一晶体管(M1),并且具有耦合到包括在输出支路中的第二晶体管(M2)的相应端子(Ga2)的控制端子(Ga1)。 根据本发明,镜电路还具有连接在第一和第二晶体管的控制端(Ga1和Ga2)两端的阻抗匹配电路,并被配置为在两端(Ga1和Ga2)处保持相同的电压值。 阻抗匹配电路具有可调节的输出阻抗,具体值低于没有该电路的值。 它用于调节第二晶体管(M2)的控制节点(Ga2)上的阻抗。 本发明同样适用于N沟道和P沟道MOS晶体管。 有利地,参考电流可以通过作为输出信号的函数的外部信号来改变,以提供反馈调节特征。

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