公开(公告)号：US4953160A

公开(公告)日：1990-08-28

申请号：US159887

申请日：1988-02-24

Applicant: Dev V. Gupta

Inventor： Dev V. Gupta

IPC: H04L25/49 ,  H04M11/00 ,  H04M11/06

CPC classification number: H04L25/4925 ,  H04M11/062

Abstract: A method and apparatus is described for transmitting and receiving data signals and voice band signals over a single pair of wires, wherein the energy content of the data signals in the voice bands is transferred to a higher frequency to avoid interference between the two. This is accomplished by sinusoidally encoding the data pulses in the frequency domain. The encoding is equivalently performed in the time domain by linearly combining weighted delayed and advanced versions of the data pulses, in accordance with a weighting formula. A transversal filter is used to multiple delayed and advanced versions of the data pulses by a scaling factor times the ratio of m!/(m-i)!i! factorial wherein i is the ith version being weighted, m is an integer greater than one and ! indicates the factorial function.

Abstract translation: 描述了一种用于通过单根线对发送和接收数据信号和语音频带信号的方法和装置，其中语音频带中的数据信号的能量内容被传送到更高的频率以避免两者之间的干扰。 这是通过对频域中的数据脉冲进行正弦编码来实现的。 根据加权公式，通过线性组合数据脉冲的加权延迟和高级版本，在时域中等效执行编码。 横向滤波器用于数据脉冲的多个延迟和高级版本，缩放因子乘以m！/（m-i）！i！ 因子其中i是加权的第i个版本，m是大于1的整数， 表示阶乘函数。

公开(公告)号：US4382300A

公开(公告)日：1983-05-03

申请号：US244881

申请日：1981-03-18

Applicant: Dev V. Gupta

Inventor： Dev V. Gupta

IPC: H03M13/15 ,  G06F11/12

CPC classification number: H03M13/15

Abstract: A received cyclic code word is clocked into a first register (11). As soon as the whole received word has been read in, it is parallel-loaded into a storage register (12). The syndrome is then formed (13) of the stored code word. This syndrome is coupled to a logic circuit (14) which determines whether the last stored bit is in error. This decision is modulo-2 added (15) with the last bit, the output being the correct version of the last bit which is then clocked into the input of the storage register. The operation is repeated a given number of times (nt*) at the end of which the maximum likelihood decision on r(x)--the cyclic code word--is present in the storage register (12), ready to be read out.

Abstract translation: 接收到的循环码字被计时到第一寄存器（11）。 一旦读取完整的接收到的字，它就被并行加载到存储寄存器（12）中。 然后形成（13）存储的代码字的综合征。 该校正子耦合到逻辑电路（14），该逻辑电路确定最后存储的位是否存在错误。 该决定与最后一位相加（15）是模2，输出是最后一位的正确版本，然后将其送入存储寄存器的输入。 该操作重复一次给定次数（nt *），其结束时r（x） - 循环码字的最大似然判定存在于存储寄存器（12）中，准备被读出。

公开(公告)号：US08970252B2

公开(公告)日：2015-03-03

申请号：US13883597

申请日：2011-11-01

Applicant: Dev V. Gupta

Inventor： Dev V. Gupta

IPC: H03K19/177

CPC classification number: H03K19/177

Abstract: In an embodiment, a field programmable analog array (FPAA) comprises state variable filter engines arranged in parallel, each state variable filter engine comprising at least one variable attenuator and at least one variable integrator configured to operate on a wideband analog signal; and a summer configured to add outputs from the state variable filter engines.

Abstract translation: 在一个实施例中，现场可编程模拟阵列（FPAA）包括并联布置的状态变量滤波器引擎，每个状态变量滤波器引擎包括至少一个可变衰减器和至少一个可变积分器，其被配置为在宽带模拟信号上操作; 以及一个加法器，用于添加来自状态变量过滤器引擎的输出。

公开(公告)号：US20130293264A1

公开(公告)日：2013-11-07

申请号：US13883597

申请日：2011-11-01

Applicant: Dev V. Gupta

Inventor： Dev V. Gupta

IPC: H03K19/177

CPC classification number: H03K19/177

Abstract: In an embodiment, a field programmable analog array (FPAA) comprises state variable filter engines arranged in parallel, each state variable filter engine comprising at least one variable attenuator and at least one variable integrator configured to operate on a wideband analog signal; and a summer configured to add outputs from the state variable filter engines.

Abstract translation: 在一个实施例中，现场可编程模拟阵列（FPAA）包括并联布置的状态变量滤波器引擎，每个状态变量滤波器引擎包括至少一个可变衰减器和至少一个可变积分器，其被配置为在宽带模拟信号上操作; 以及一个加法器，用于添加来自状态变量过滤器引擎的输出。

公开(公告)号：US08483626B2

公开(公告)日：2013-07-09

申请号：US13175260

申请日：2011-07-01

Applicant: Dev V. Gupta

Inventor： Dev V. Gupta

IPC: H04B1/40 ,  H04B1/10 ,  H04B1/16 ,  H04B1/04

CPC classification number: H04B1/0028

Abstract: Present software-defined radios (SDR) employ front end circuits that contain multiple receivers and transmitters for each band of interest, which is inflexible, expensive and power inefficient. A programmable front end circuit is implemented on a CMOS device and is configurable to transmit and receive signals in a wide band of frequencies, thereby providing an adaptable transmitter and receiver operable with current and future wireless networking technologies.

Abstract translation: 目前的软件定义无线电（SDR）采用前端电路，其中包含每个感兴趣的频带的多个接收机和发射机，这是不灵活，昂贵和功率低效的。 可编程前端电路在CMOS器件上实现，并且可配置为在宽频带内发送和接收信号，从而提供可适用于当前和未来无线网络技术的发射器和接收器。

公开(公告)号：US20120293233A1

公开(公告)日：2012-11-22

申请号：US13576635

申请日：2011-02-11

Applicant: Dev V. Gupta ,  Zhiguo Lai

Inventor： Dev V. Gupta ,  Zhiguo Lai

IPC: G06G7/14 ,  H04B3/02 ,  G06G7/18

CPC classification number: H03F3/45183 ,  H03F1/223 ,  H03F3/19 ,  H03F3/45188 ,  H03F3/45197 ,  H03F3/45201 ,  H03F2200/264 ,  H03F2200/36 ,  H03F2203/45318 ,  H03F2203/45374 ,  H03F2203/45644 ,  H03F2203/45686 ,  H03F2203/45702 ,  H03H7/24 ,  H03H7/25 ,  H03H7/482 ,  H03H7/487 ,  H03H11/1256 ,  H03H11/53 ,  H03H2210/017 ,  H03H2210/021 ,  H03H2210/028 ,  H03H2210/036 ,  H03H2210/04

Abstract: Broadband analog radio-frequency devices can be used to create building blocks for scalable analog signal processors that operate over bandwidths of 50 MHz to 20 GHz or more. Example devices include integrators (transconductors), digitally controlled attenuators, buffers, and scalable summers implemented using deep sub-micron CMOS technology. Because the devices are implemented in CMOS, the ratio of trace/component size to signal wavelength is about the same as that of low-frequency devices implemented in printed circuit boards. Combining this scaling with high gain/high bandwidth enables implementation of feedback and programmability for broadband analog signal processing.

Abstract translation: 宽带模拟射频设备可用于为可扩展的模拟信号处理器创建构建块，该处理器的工作频率可达50 MHz至20 GHz或更高。 示例器件包括使用深亚微米CMOS技术实现的积分器（跨导体），数字控制衰减器，缓冲器和可扩展的夏季。 由于器件是用CMOS实现的，所以迹线/器件尺寸与信号波长的比率与印刷电路板中实现的低频器件的比率大致相同。 将此扩展与高增益/高带宽相结合，可实现宽带模拟信号处理的反馈和可编程性。

公开(公告)号：US20110051782A1

公开(公告)日：2011-03-03

申请号：US12921987

申请日：2009-03-10

Applicant: Divi Gupta ,  Dev V. Gupta

Inventor： Divi Gupta ,  Dev V. Gupta

IPC: H04B1/00

CPC classification number: H03H11/1291 ,  H03H11/12 ,  H03H11/1252 ,  H03H2240/00

Abstract: Embodiments include methods, systems, and apparatuses capable of dynamically and adaptively operating on wideband signals. Examples include state variable filters whose center frequencies can be tuned using variable gain blocks coupled to outputs of filter integrators. First- and second-order state variable filters may operate on signals in parallel and their outputs combined to produce a filtered output. Filters may be tuned to pass or reject signals depending on the application; sample applications include, but are not limited to: agile filtering; spectrum analysis; interference detection and rejection; equalization; direct intermediate-frequency transmission; and single-sideband modulation and demodulation.

Abstract translation: 实施例包括能够在宽带信号上动态和自适应地操作的方法，系统和装置。 示例包括状态变量滤波器，其中心频率可以使用耦合到滤波器积分器的输出的可变增益块进行调谐。 一阶和二阶状态变量滤波器可以对并联的信号进行操作，并且它们的输出组合以产生滤波输出。 可以根据应用调整滤波器以通过或拒绝信号; 示例应用程序包括但不限于：敏捷过滤; 频谱分析; 干扰检测和拒绝; 均衡 直接中频传输; 和单边带调制解调。

公开(公告)号：US07139247B2

公开(公告)日：2006-11-21

申请号：US09952321

申请日：2001-09-13

Applicant: Gautam Desai ,  Prasad Dorbala ,  Subrahmanyam Dravida ,  Dev V. Gupta ,  Anoop Jayadevan ,  Kiran Rege ,  Manas Tandon ,  Sitaram Dikshitulu

Inventor： Gautam Desai ,  Prasad Dorbala ,  Subrahmanyam Dravida ,  Dev V. Gupta ,  Anoop Jayadevan ,  Kiran Rege ,  Manas Tandon ,  Sitaram Dikshitulu

IPC: H04L12/28

CPC classification number: H04L61/2015 ,  H04L12/2801 ,  H04L12/2856 ,  H04L12/2859 ,  H04L12/2872 ,  H04L12/2876 ,  H04L12/4641 ,  H04L29/12216 ,  H04L41/0853 ,  H04L41/12 ,  H04L41/5003 ,  H04L45/02 ,  H04L45/026 ,  H04L47/10 ,  H04L47/15 ,  H04L47/20 ,  H04L47/24 ,  H04L47/2416 ,  H04L47/2425 ,  H04L47/2441 ,  H04L47/2491 ,  H04L47/32 ,  H04L47/70 ,  H04L47/724 ,  H04L47/788 ,  H04L47/801 ,  H04L47/805 ,  H04L47/822 ,  H04L47/829 ,  H04L2012/5605 ,  H04L2012/5606 ,  H04L2012/561 ,  H04L2012/5651 ,  H04L2012/5679 ,  H04N7/10 ,  H04N7/17309 ,  H04N21/6118 ,  H04N21/6168 ,  H04Q3/0045

Abstract: Hybrid fiber/coax networks employ the existing cable plant used for cable TV and transmit data signals in a frequency bandwidth above that which is used for cable TV. As this cable plant was deployed in a tree and branch topology, data transmissions may be susceptible to noise, variable transmission loss and frequency dispersion, particularly in the upstream direction. Further, due to the tree and branch topology, homes at the far end of the network experience much greater loss than do the homes that are near to the headend/ONU. The present system, which uses point-to-point data links between intelligent network elements located in the feeder/distribution network to provide reliable, secure, bi-directional broadband access. Digital signals are terminated at the intelligent network elements, switched and regenerated for transmission across additional upstream or downstream data links as needed to connect a home to a headend or router. The intelligent network elements can be co-located with or replace the standard network elements to take advantage of existing network configurations. The standard network elements can be selectively replaced by the intelligent network elements in an incremental approach. A method of discovering the network topology includes sending a message from one of the network elements on a transmission path to a topology server, the message including information identifying the one network element. At each intermediate network element in the transmission path, information identifying each intermediate network element is appended to the message. In this manner, the data links are made over relatively short runs of coax cable, which can provide greater bandwidth than the typical end-to-end feeder/distribution connection between a home and the headend or optical network unit.

公开(公告)号：USRE36862E

公开(公告)日：2000-09-12

申请号：US712487

申请日：1996-09-11

Applicant: Dev V. Gupta ,  Kyung-Yeop Hong

Inventor： Dev V. Gupta ,  Kyung-Yeop Hong

IPC: H04L1/24 ,  H03M5/12

CPC classification number: H04L1/247

Abstract: Loop Performance Monitoring (LPM) for DDS loops is described. Even though DDS loops have Intentional Bipolar Violations (BPVs), a Loop Coding Violations (LCVs) detection strategy based on further processing of BPVs is described. By monitoring LCVs a local loop terminating device can determine Bit Error Rate (BER).A system is described by which an Office Channel Unit (OCU) can process LCV information to determine signal quality of the signal over the incoming local loop. If the signal quality falls below a certain threshold, the OCU can cut the loop off from the DDS circuit and send control codes into the network.A system is also described where a Network Interface Unit (NIU) with the LPM system communicates incoming LCV information to the OCU using low speed signalling over the simplex path between the transmit and receive pairs. The OCU monitors incoming LCVs as well, and thus has the information necessary to determine bi-directional BER performance.

Abstract translation: 描述了DDS循环的循环性能监控（LPM）。 尽管DDS循环具有故意双极违例（BPV），但是描述了基于BPV进一步处理的循环编码违规（LCV）检测策略。 通过监视LCV，本地环路终端设备可以确定误码率（BER）。 描述了一种系统，通过该系统，Office信道单元（OCU）可以处理LCV信息以确定通过传入本地环路的信号的信号质量。 如果信号质量低于某个阈值，OCU可以从DDS电路中切断环路，并将控制码发送到网络中。 还描述了一种系统，其中具有LPM系统的网络接口单元（NIU）通过在发送和接收对之间的单工路径上的低速信令将输入的LCV信息传送到OCU。 OCU也监视输入的LCV，因此具有确定双向BER性能所需的信息。

公开(公告)号：US5905726A

公开(公告)日：1999-05-18

申请号：US651825

申请日：1996-05-21

Applicant: Dev V. Gupta

Inventor： Dev V. Gupta

IPC: H04L12/56 ,  H04N7/14 ,  H04N7/15 ,  H04N7/173 ,  H04L12/18

CPC classification number: H04L12/5601 ,  H04L49/106 ,  H04L49/1576 ,  H04L49/203 ,  H04L49/309 ,  H04N7/147 ,  H04N7/15 ,  H04N7/17318 ,  H04L2012/5605 ,  H04L2012/5613 ,  H04L2012/5618 ,  H04L2012/5681

Abstract: A communication system is described which enables efficient delivery of asymmetrical bandwidth signals over a communication network. The system includes a virtual circuit switch having a space switch coupled thereto for distributing downstream signals from a backbone network to subscribers in a cost effective manner.

Abstract translation: 描述了能够在通信网络上有效地传送不对称带宽信号的通信系统。 该系统包括具有耦合到其上的空间开关的虚拟电路开关，用于以成本有效的方式将来自骨干网络的下行信号分配给用户。