公开(公告)号：US20050199949A1

公开(公告)日：2005-09-15

申请号：US10923472

申请日：2004-08-20

申请人： Robert Chau ,  Brian Dovle ,  Jack Kavalieros ,  Douglas Barlage ,  Suman Datta ,  Scott Hareland

发明人： Robert Chau ,  Brian Dovle ,  Jack Kavalieros ,  Douglas Barlage ,  Suman Datta ,  Scott Hareland

IPC分类号： H01L21/336 ,  H01L29/423 ,  H01L29/786 ,  H01L21/00 ,  H01L29/76

CPC分类号： H01L29/785 ,  B82Y10/00 ,  H01L29/0665 ,  H01L29/0673 ,  H01L29/1033 ,  H01L29/41791 ,  H01L29/42384 ,  H01L29/42392 ,  H01L29/4908 ,  H01L29/66795 ,  H01L29/772 ,  H01L29/7854 ,  H01L29/78645 ,  H01L29/78696 ,  H01L51/0048 ,  H01L51/0554 ,  Y10S977/742 ,  Y10S977/842 ,  Y10S977/938

摘要： The present invention is a semiconductor device comprising a semiconductor body having a top surface and laterally opposite sidewalls formed on a substrate. A gate dielectric layer is formed on the top surface of the semiconductor body and on the laterally opposite sidewalls of the semiconductor body. A gate electrode is formed on the gate dielectric on the top surface of the semiconductor body and adjacent to the gate dielectric on the laterally opposite sidewalls of the semiconductor body.

公开(公告)号：US07504678B2

公开(公告)日：2009-03-17

申请号：US10703316

申请日：2003-11-07

申请人： Robert S. Chau ,  Brian S. Doyle ,  Jack Kavalieros ,  Douglas Barlage ,  Suman Datta

发明人： Robert S. Chau ,  Brian S. Doyle ,  Jack Kavalieros ,  Douglas Barlage ,  Suman Datta

IPC分类号： H01L29/80 ,  H01L31/112

CPC分类号： H01L29/785 ,  B82Y10/00 ,  H01L29/0665 ,  H01L29/0673 ,  H01L29/1033 ,  H01L29/41791 ,  H01L29/42384 ,  H01L29/42392 ,  H01L29/4908 ,  H01L29/66795 ,  H01L29/772 ,  H01L29/7854 ,  H01L29/78645 ,  H01L29/78696 ,  H01L51/0048 ,  H01L51/0554 ,  Y10S977/742 ,  Y10S977/842 ,  Y10S977/938

摘要： The present invention is a semiconductor device comprising a semiconductor body having a top surface and laterally opposite sidewalls formed on a substrate. A gate dielectric layer is formed on the top surface of the semiconductor body and on the laterally opposite sidewalls of the semiconductor body. A gate electrode is formed on the gate dielectric on the top surface of the semiconductor body and adjacent to the gate dielectric on the laterally opposite sidewalls of the semiconductor body.

公开(公告)号：US07005366B2

公开(公告)日：2006-02-28

申请号：US10923472

申请日：2004-08-20

申请人： Robert S. Chau ,  Brian S. Doyle ,  Jack Kavalieros ,  Douglas Barlage ,  Suman Datta ,  Scott A. Hareland

发明人： Robert S. Chau ,  Brian S. Doyle ,  Jack Kavalieros ,  Douglas Barlage ,  Suman Datta ,  Scott A. Hareland

IPC分类号： H01L21/3205 ,  H01L21/4763

CPC分类号： H01L29/785 ,  B82Y10/00 ,  H01L29/0665 ,  H01L29/0673 ,  H01L29/1033 ,  H01L29/41791 ,  H01L29/42384 ,  H01L29/42392 ,  H01L29/4908 ,  H01L29/66795 ,  H01L29/772 ,  H01L29/7854 ,  H01L29/78645 ,  H01L29/78696 ,  H01L51/0048 ,  H01L51/0554 ,  Y10S977/742 ,  Y10S977/842 ,  Y10S977/938

摘要： The present invention is a semiconductor device comprising a semiconductor body having a top surface and laterally opposite sidewalls formed on a substrate. A gate dielectric layer is formed on the top surface of the semiconductor body and on the laterally opposite sidewalls of the semiconductor body. A gate electrode is formed on the gate dielectric on the top surface of the semiconductor body and adjacent to the gate dielectric on the laterally opposite sidewalls of the semiconductor body.

公开(公告)号：US06914295B2

公开(公告)日：2005-07-05

申请号：US10887609

申请日：2004-07-08

申请人： Robert S. Chau ,  Brian S. Doyle ,  Jack Kavalieros ,  Douglas Barlage ,  Suman Datta ,  Scott A. Hareland

发明人： Robert S. Chau ,  Brian S. Doyle ,  Jack Kavalieros ,  Douglas Barlage ,  Suman Datta ,  Scott A. Hareland

IPC分类号： H01L21/336 ,  H01L29/423 ,  H01L29/786 ,  H01L29/76 ,  H01L29/94

CPC分类号： H01L29/785 ,  B82Y10/00 ,  H01L29/0665 ,  H01L29/0673 ,  H01L29/1033 ,  H01L29/41791 ,  H01L29/42384 ,  H01L29/42392 ,  H01L29/4908 ,  H01L29/66795 ,  H01L29/772 ,  H01L29/7854 ,  H01L29/78645 ,  H01L29/78696 ,  H01L51/0048 ,  H01L51/0554 ,  Y10S977/742 ,  Y10S977/842 ,  Y10S977/938

摘要： The present invention is a semiconductor device comprising a semiconductor body having a top surface and laterally opposite sidewalls formed on a substrate. A gate dielectric layer is formed on the top surface of the semiconductor body and on the laterally opposite sidewalls of the semiconductor body. A gate electrode is formed on the gate dielectric on the top surface of the semiconductor body and adjacent to the gate dielectric on the laterally opposite sidewalls of the semiconductor body.