公开(公告)号：US20060009469A1

公开(公告)日：2006-01-12

申请号：US11140294

申请日：2005-05-27

Applicant: Leonore Witchey-Lakshmanan ,  Sydney Ugwu ,  Varda Sandweiss ,  Catherine Hardalo ,  Roberta Hare ,  Gopal Krishna ,  Zaiqi Wang ,  Marco Taglietto

Inventor： Leonore Witchey-Lakshmanan ,  Sydney Ugwu ,  Varda Sandweiss ,  Catherine Hardalo ,  Roberta Hare ,  Gopal Krishna ,  Zaiqi Wang ,  Marco Taglietto

IPC: A61K31/496

CPC classification number: A61K9/0019 ,  A61K31/137 ,  A61K31/496 ,  A61K31/513 ,  A61K31/7048 ,  A61K45/06 ,  A61K47/24 ,  A61K47/26 ,  Y02A50/409 ,  Y02A50/414 ,  A61K2300/00

Abstract: The present invention provides formulations useful for treating infections, in particular, formulations that include the active pharmaceutical ingredient posaconazole in an injectable suspension that is stable when subjected to terminal steam sterilization.

Abstract translation: 本发明提供了可用于治疗感染的制剂，特别是在经受终端蒸汽灭菌时稳定的可注射悬浮液中包含活性药物成分泊沙康唑的制剂。

公开(公告)号：US06950434B1

公开(公告)日：2005-09-27

申请号：US09496212

申请日：2000-02-01

Applicant: Somnath Viswanath ,  Gopal Krishna

Inventor： Somnath Viswanath ,  Gopal Krishna

IPC: H04L12/28 ,  H04L12/56

CPC classification number: H04L49/3009 ,  H04L49/351 ,  H04L49/602

Abstract: A network switch, configured for performing layer 2 and layer 3 switching in an Ethernet (IEEE 802.3) network without blocking of incoming data packets, includes network switch ports, each including a flow module configured for generating a packet signature based on layer 3 information within a received data packet. The flow module generates first and second hash keys according to a prescribed hashing function upon obtaining first and second portions of layer 3 information. The flow module combines the first and second hash keys to form the packet signature, and searches an on-chip signature table that indexes addresses of layer 3 switching entries by entry signatures, where the entry signatures are generated using the same prescribed hashing function on the first and second layer 3 portions of the layer 3 switching entries.

Abstract translation: 配置用于在以太网（IEEE 802.3）网络中执行层2和层3切换而不阻塞传入数据分组的网络交换机包括网络交换机端口，每个网络交换机端口包括被配置用于基于第3层内的信息生成分组签名的流模块 接收到的数据包。 流模块在获得第三层信息的第一和第二部分时，根据规定的散列函数生成第一和第二散列密钥。 流模块组合第一和第二散列密钥以形成分组签名，并且搜索片上签名表，其通过条目签名索引第3层交换条目的地址，其中使用相同的规定散列函数生成条目签名 层3的第一和第二层3部分切换条目。

公开(公告)号：US06760341B1

公开(公告)日：2004-07-06

申请号：US09512591

申请日：2000-02-24

Applicant: Bahadir Erimli ,  Gopal Krishna

Inventor： Bahadir Erimli ,  Gopal Krishna

IPC: H04L1228

CPC classification number: H04L49/103 ,  H04L49/15 ,  H04L49/351 ,  H04L49/90 ,  H04L49/9057

Abstract: A network switching system having a plurality of multiport switch modules and respective connected buffer memory devices assigns in each of the buffer memory devices a memory segment for storage of frame data from a corresponding one of the switch modules. Each memory device is divided into memory segments, also referred to as memory regions, wherein each memory segment is configured for storing frame data from a corresponding one of the switch modules. Hence, each switch module is configured for writing frame data, for a data frame received on one of the corresponding switch ports, into the corresponding assigned memory segment of each of the buffer memory devices. Any one of the switch modules can access any location of the buffer memory devices, enabling any one switch module to retrieve frame data from the buffer memory devices that was stored by another one of the switch modules. In addition, the assignment of memory segments enables a switch module having accessed frame data from the buffer memory to determine the switch module that originally stored the frame data based on the location of the stored frame data within one of the memory segments, simplifying buffer memory resource management.

Abstract translation: 具有多个多端口交换模块和相应连接的缓冲存储器设备的网络交换系统在每个缓冲存储器设备中分配用于从对应的一个交换机模块存储帧数据的存储器段。 每个存储器件被分成存储器段，也称为存储器区域，其中每个存储器段被配置用于存储来自相应的一个开关模块的帧数据。 因此，每个开关模块被配置为将对于在相应的开关端口之一接收的数据帧写入帧数据到每个缓冲存储器件的相应的分配的存储器段中。 任何一个交换机模块可以访问缓冲存储器设备的任何位置，使得任何一个交换机模块能够从由另一个交换机模块存储的缓冲存储器设备中检索帧数据。 此外，存储器段的分配使得具有来自缓冲存储器的已访问帧数据的交换机模块基于存储在其中一个存储器段中的存储的帧数据的位置来确定原始存储帧数据的交换模块，从而简化缓冲存储器 资源管理。

公开(公告)号：US08489759B2

公开(公告)日：2013-07-16

申请号：US12774879

申请日：2010-05-06

Applicant: Jeffrey B. Parham ,  Charles R. Reeves ,  Lawrence A. Buerk ,  Angela Mills ,  Richard L. Hasha ,  Gopal Krishna R. Kakivaya ,  Andrew D. Milligan

Inventor： Jeffrey B. Parham ,  Charles R. Reeves ,  Lawrence A. Buerk ,  Angela Mills ,  Richard L. Hasha ,  Gopal Krishna R. Kakivaya ,  Andrew D. Milligan

IPC: G06F15/16 ,  G06F9/46 ,  G06F17/30

CPC classification number: H04L67/16 ,  G06F9/541 ,  H04L29/12113 ,  H04L61/1541

Abstract: A system and methods for service discovery and publication are disclosed. Application programs write requests for service discovery, publication, and subscription to a service discovery application programming interface. The service discovery application programming interface invokes one or more lower-level protocols to satisfy the discovery, publication and/or subscription request. Service information retrieved from lower-layer protocols is formatted into a consistent data model and returned to the client application. In addition, service information may be stored in a persistent data store managed by a discovery persistence service communicatively connected to the service discovery API.

Abstract translation: 公开了一种用于服务发现和发布的系统和方法。 应用程序将服务发现，发布和订阅的请求写入服务发现应用程序编程接口。 服务发现应用程序编程接口调用一个或多个低级协议以满足发现，发布和/或订阅请求。 从低层协议检索的服务信息被格式化为一致的数据模型并返回给客户端应用程序。 此外，服务信息可以存储在通过通信地连接到服务发现API的发现持久性服务管理的持久数据存储中。

公开(公告)号：US08487683B1

公开(公告)日：2013-07-16

申请号：US13356610

申请日：2012-01-23

Applicant: Siddhartha Gopal Krishna ,  Senthil Velan K

Inventor： Siddhartha Gopal Krishna ,  Senthil Velan K

IPC: H03K5/13

CPC classification number: H03K5/13

Abstract: A circuit for generating multi-phase, non-overlapping clock signals includes a shift register that generates first and second clock signals from an input clock signal. First and second circuit modules generate corresponding first and second interim signals using the first and second clock signals and first and second feedback signals, respectively. The first and second interim signals are non-overlapping by at least a predetermined minimum time difference. The first and second interim signals are multiplexed to generate an output signal. The output signal is delayed by a first predetermined time to generate a first delay signal. The first delay signal is delayed by a second predetermined time to generate a second delay signal. The second delay signal is de-multiplexed to generate the first and the second feedback signals, and the first delay signal is de-multiplexed to generate the set of multi-phase, non-overlapping clock signals.

Abstract translation: 用于产生多相不重叠时钟信号的电路包括从输入时钟信号产生第一和第二时钟信号的移位寄存器。 第一和第二电路模块分别使用第一和第二时钟信号以及第一和第二反馈信号产生对应的第一和第二中间信号。 第一和第二中间信号至少是预定的最小时间差不重叠。 第一和第二中间信号被多路复用以产生输出信号。 输出信号被延迟第一预定时间以产生第一延迟信号。 第一延迟信号被延迟第二预定时间以产生第二延迟信号。 第二延迟信号被解复用以产生第一和第二反馈信号，并且第一延迟信号被去多路复用以产生一组多相不重叠的时钟信号。

公开(公告)号：US20110046063A1

公开(公告)日：2011-02-24

申请号：US12856088

申请日：2010-08-13

Applicant: Nagesh PALEPU ,  Rajeshwar MOTHERAM ,  Praful SHAH ,  Gopal KRISHNA

Inventor： Nagesh PALEPU ,  Rajeshwar MOTHERAM ,  Praful SHAH ,  Gopal KRISHNA

IPC: A61K38/10 ,  A61P9/00

CPC classification number: A61K38/58

Abstract: Ready-to-use bivalirudin compositions, methods of using the ready-to-use bivalirudin compositions, and methods of preparing the ready-to-use bivalirudin compositions. The ready-to-use bivalirudin compositions comprise bivalirudin and one or more stabilizing agents. The one or more stabilizing agents may be buffering agents having a pKa of about 2.5 to about 6.5, pH-adjusting agents, polymers, preservatives, antioxidants, sugars or polyols, or a combination thereof. The ready-to-use bivalirudin compositions may also comprise [9-10]-cycloimido bivalirudin, [11-12]-cycloimido bivalirudin, or a combination thereof. The method of using the ready-to-use bivalirudin compositions comprises administering the ready-to-use compositions to a patient in need thereof. Further, the method of preparing the ready-to-use bivalirudin compositions comprises mixing bivalirudin with one or more stabilizing agents.

Abstract translation: 即用比伐卢定组合物，使用即用比伐卢定组合物的方法，以及制备即用型比伐卢定组合物的方法。 即用型比伐卢列组合物包含比伐卢定和一种或多种稳定剂。 一种或多种稳定剂可以是pKa为约2.5至约6.5的缓冲剂，pH调节剂，聚合物，防腐剂，抗氧化剂，糖或多元醇或其组合。 即用型比伐卢定组合物还可以包含[9-10] - 环亚氨基比伐卢定，[11-12] - 环亚氨基比伐卢定或其组合。 使用即用比伐卢定组合物的方法包括将即用组合物给予有需要的组合物。 此外，制备即用型比伐卢定组合物的方法包括将比伐卢定与一种或多种稳定剂混合。

公开(公告)号：US07437711B2

公开(公告)日：2008-10-14

申请号：US10633911

申请日：2003-08-04

Applicant: Christopher W. Brumme ,  James M. Lyon ,  Michael J. Toutonghi ,  Satish R. Thatte ,  Gopal Krishna R. Kakivaya ,  Richard D. Hill ,  Jan S. Gray ,  Craig H. Wittenberg ,  Rebecca A. Norlander ,  Scott G. Robinson ,  Eric W. Johnson

Inventor： Christopher W. Brumme ,  James M. Lyon ,  Michael J. Toutonghi ,  Satish R. Thatte ,  Gopal Krishna R. Kakivaya ,  Richard D. Hill ,  Jan S. Gray ,  Craig H. Wittenberg ,  Rebecca A. Norlander ,  Scott G. Robinson ,  Eric W. Johnson

IPC: G06F9/45

CPC classification number: G06F9/548

Abstract: Communication among agile objects and context-bound objects within object-oriented programming environments, including communication across contextual boundaries, is disclosed. In one embodiment, a reference to a second object within a second context is wrapped in a proxy wrapper. A first object within a first context calls the second object via the wrapped reference. No direct reference is held by the first object to the second object. Other embodiments relate to agile objects. Agile objects called by context-bound objects execute in the contexts of their callers. The context of a calling context-bound object becomes the context of an agile object for calling of the agile object by the calling context-bound object. Direct reference to the agile object by the context-bound object is thus permitted.

Abstract translation: 公开了面向对象编程环境中的敏捷对象和上下文绑定对象之间的通信，包括跨语境边界的通信。 在一个实施例中，对第二上下文中的第二对象的引用被包裹在代理包装器中。 第一个上下文中的第一个对象通过包装引用调用第二个对象。 第一个对象不直接引用第二个对象。 其他实施例涉及敏捷对象。 上下文绑定对象调用的敏捷对象在其调用者的上下文中执行。 调用上下文绑定对象的上下文成为用于通过调用上下文绑定对象调用敏捷对象的敏捷对象的上下文。 因此允许上下文绑定对象直接引用敏捷对象。

公开(公告)号：US07429895B2

公开(公告)日：2008-09-30

申请号：US11366006

申请日：2006-02-28

Applicant: Prakash Easwaran ,  Anant Shankar Kamath ,  Rupak Ghayal ,  Birman Chattopadhyay ,  Gopal Krishna Nayak ,  Sameer Raghavendra Joshi ,  Mithun Guddethota Neelakant ,  Subhash Yekanath Pai ,  Shivaprakash Halagur

Inventor： Prakash Easwaran ,  Anant Shankar Kamath ,  Rupak Ghayal ,  Birman Chattopadhyay ,  Gopal Krishna Nayak ,  Sameer Raghavendra Joshi ,  Mithun Guddethota Neelakant ,  Subhash Yekanath Pai ,  Shivaprakash Halagur

IPC: H03L7/00

CPC classification number: H03L7/093 ,  E05Y2400/30 ,  H03L7/099 ,  H03L7/189

Abstract: Various systems and methods for drift compensation are disclosed. As one example, a system for compensating drift in a control circuit is disclosed that includes at least two control signals. One of the control signals is provided by a circuit that is susceptible to drift. This control signal is provided both to a systems or device under control, and to a detection circuit. The detection circuit is operable to detect a drift in the control signal. In addition, the detection circuit provides another control signal that varies as a function of the drift in the received control signal.

Abstract translation: 公开了用于漂移补偿的各种系统和方法。 作为一个示例，公开了一种用于补偿控制电路中的漂移的系统，其包括至少两个控制信号。 控制信号之一由容易漂移的电路提供。 该控制信号被提供给被控制的系统或设备，以及检测电路。 检测电路可操作以检测控制信号中的漂移。 此外，检测电路提供另一控制信号，该控制信号根据所接收的控制信号中的漂移而变化。

公开(公告)号：US07293113B1

公开(公告)日：2007-11-06

申请号：US10447824

申请日：2003-05-28

Applicant: Gopal Krishna ,  Mrudula Kanuri

Inventor： Gopal Krishna ,  Mrudula Kanuri

IPC: G06F15/16 ,  G06F1/32

CPC classification number: H04L69/16 ,  H04L69/12 ,  H04L69/161 ,  H04L69/167 ,  H04L69/22

Abstract: A communication processor comprises a data link layer parser circuit (310) and a plurality of network layer parser circuits (322, 326). The data link layer parser circuit (310) receives a data link layer frame, and removes a data link layer header therefrom to provide a network layer frame as an output. Each network layer parser circuit corresponds to a different network layer protocol, and is selectively activated to receive the network layer frame and to process a network layer header therefrom to provide a transport layer frame as an output. The data link layer parser circuit (310) further examines a portion of the network layer frame to determine which of the plurality of network protocols is used. The data link layer parser circuit (310) activates a corresponding one of the plurality of network layer parser circuits (322, 326) in response, while keeping another one of the plurality of network layer parser circuits (322, 326) inactive.

Abstract translation: 通信处理器包括数据链路层解析器电路（310）和多个网络层解析器电路（322,326）。 数据链路层解析器电路（310）接收数据链路层帧，并从其中去除数据链路层报头，以提供网络层帧作为输出。 每个网络层解析器电路对应于不同的网络层协议，并且被选择性地激活以接收网络层帧并处理其中的网络层报头以提供传输层帧作为输出。 数据链路层解析器电路（310）进一步检查网络层帧的一部分以确定使用多个网络协议中的哪一个。 数据链路层解析器电路（310）响应于激活多个网络层解析器电路（322,326）中的对应的一个，同时保持多个网络层解析器电路（322,326）中的另一个不起作用。

公开(公告)号：US5873121A

公开(公告)日：1999-02-16

申请号：US753025

申请日：1996-11-19

Applicant: Shashank Merchant ,  Alok Singh ,  Gopal Krishna

Inventor： Shashank Merchant ,  Alok Singh ,  Gopal Krishna

IPC: H04L12/56 ,  H04L29/06 ,  G06F12/02

CPC classification number: H04L29/06 ,  H04L49/90

Abstract: The present invention provides a method and apparatus for storing additional information, such as HOLE information, within a buffer while minimizing the overhead.A method according to the present invention for efficiently storing additional information in a memory, the memory including at least one address, the memory for storing at least a portion of a packet to be transferred by a network system, the method comprising the steps of determining whether the at least a portion of a packet ends at a boundary of the at least one address; encoding a portion of the packet to indicate that the packet ends at the address boundary if the packet ends at the address boundary; and encoding a portion of the at least one address to indicate that the packet does not end at the address boundary, if the packet does not end at the address boundary.

Abstract translation: 本发明提供了一种用于在缓冲器内存储附加信息（诸如HOLE信息）同时最小化开销的方法和装置。 根据本发明的用于将附加信息有效地存储在存储器中的方法，所述存储器包括至少一个地址，所述存储器用于存储要由网络系统传送的分组的至少一部分，所述方法包括以下步骤：确定 分组的至少一部分是否在所述至少一个地址的边界处结束; 编码分组的一部分以指示分组在地址边界处结束，如果分组在地址边界处结束; 以及编码所述至少一个地址的一部分以指示所述分组不在所述地址边界处结束，如果所述分组未在所述地址边界处结束。