Abstract:
A light guide plate includes a light incident surface, a light facing surface facing the light incident surface, a connection surface connecting the light incident surface with the light facing surface, and a top surface connected with the light incident surface, the light facing surface, and the connection surface. The light incident surface receives light from a light source, the light facing surface reflects light, and the top surface outputs light toward a display panel. The connection surface includes at least two absorption surfaces parallel to a straight line linking a center of an arc with an end of the light incident surface and at least one reflective surface interposed the two adjacent absorption surfaces to reflect the light.
Abstract:
A method and system for providing asynchronous data communication between a plurality of devices in a networked environment is disclosed. A user using a first device views view media content received from a first content provider of a plurality of service providers. At a request of the user, a message including a data link to the media content is generated and asynchronously sent to a second device via a network. The data link contained in the received message on the second device is used to retrieve the media content from a second content provider. Various action commands contained in the message are used to control the operation of the media content on the second device.
Abstract:
A new memory cell can contain only a single thyristor. There is no need to include an access transistor in the cell. In one embodiment, the thyristor is a thin capacitively coupled thyristor. The new memory cell can be connected to word, bit, and control lines in several ways to form different memory arrays. Timing and voltage levels of word, bit and control lines are disclosed.
Abstract:
A method for distributing log block associativity in log buffer-based flash translation layer (FTL) includes, if write request on page p is generated, checking whether log block associated with corresponding data block that write request is generated exists or not by checking log block mapping table storing mapping information between data blocks and log blocks, wherein the associativity of each log block to data block is set to equal to or less than predetermined value K in advance, and K is a natural number, if log block associated with corresponding data block that write request is generated exists, checking whether associated log block is random log block or sequential log block, and if associated log block is random log block, writing data that write request is generated in first free page of random log block.
Abstract:
A memory cell is provided which includes an access transistor and a gated lateral thyristor (GLT) device. The access transistor includes a source node. The gated lateral thyristor (GLT) device includes an anode node coupled to the source node of the access transistor.
Abstract:
A method is provided for fabricating a memory device. A semiconductor substrate is provided which includes a first well region having a first conductivity type, a second well region having the first conductivity type, a first gate structure overlying the first well region and the second gate structure overlying the second well region. An insulating material layer is conformally deposited overlying exposed portions of the semiconductor substrate. Photosensitive material is provided over a portion of the insulating material layer which overlies a portion of the second well region. The photosensitive material exposes portions of the insulating material layer. The exposed portions of the insulating material layer are anisotropically etched to provide a sidewall spacer adjacent a first sidewall of the second gate structure, and an insulating spacer block formed overlying a portion of the second gate structure and adjacent a second sidewall of the second gate structure. A drain region and a source/base region are formed in the semiconductor substrate adjacent the first gate structure and a cathode region is formed in the semiconductor substrate adjacent the second gate structure. The drain region, the source/base region, and the cathode region have a second conductivity type. An anode region of the first conductivity type is formed adjacent the second gate structure in a portion of the source/base region.
Abstract:
Disclosed is a can end with an improved opening and drinking convenience. The can end includes a body having an opening piece defined in a predetermined region of an upper surface thereof by scores, and a tab coupled to the body by means of a rivet. The tab has a first end located at one side of the rivet to form a grip portion, and a second end located at the other side of the rivet to form a pressure portion for pressing the opening piece. The scores include a center score formed at the center of the opening piece and having a center axis extending in the same direction as an extending direction of the tab, a first boundary score continuously extended symmetrically left and right from a first end of the center score adjacent to the rivet, and a second boundary score having a drinking line portion continuously extended symmetrically left and right from a second end of the center score opposite to the rivet, and lengthened line portions extended downward from both ends of the drinking line portion to the vicinity of both ends of the first boundary score. The first and second boundary scores divide the opening piece from the remaining region of the upper surface of the body. At least a region between the first boundary score and the second boundary score forms a stay portion.
Abstract:
A dynamically-operating restoration circuit is used to apply a voltage or current restore pulse signal to thyristor-based memory cells and therein restore data in the cell using the internal positive feedback loop of the thyristor. In one example implementation, the internal positive feedback loop in the thyristor is used to restore the conducting state of a device after the thyristor current drops below the holding current. A pulse and/or periodic waveform are defined and applied to ensure that the thyristor is not released from its conducting state. The time average of the periodic restore current in the thyristor may be lower than the holding current threshold. While not necessarily limited to memory cells that are thyristor-based, various embodiments of the invention have been found to be the particularly useful for high-speed, low-power memory cells in which a thin capacitively-coupled thyristor is used to provide a bi-stable storage element.
Abstract:
In a method of fabricating a semiconductor memory device, a thyristor may be formed in a layer of semiconductor material. Carbon may be implanted and annealed in a base-emitter junction region for the thyristor to affect leakage characteristics. The density of the carbon and/or a bombardment energy and/or an anneal therefore may be selected to establish a low-voltage, leakage characteristic for the junction substantially greater than its leakage absent the carbon. In one embodiment, an anneal of the implanted carbon may be performed in common with an activation for other implant regions the semiconductor device.
Abstract:
A method of fabricating a thyristor-based memory may include forming different opposite conductivity-type regions in silicon for defining a thyristor and an access device in series relationship. An activation anneal may activate dopants previously implanted for the different regions. A damaging implant of germanium or xenon or argon may be directed into select regions of the silicon including at least one p-n junction region for the access device and the thyristor. A re-crystallization anneal may then be performed to re-crystallize at least some of the damaged lattice structure resulting from the damaging implant. The re-crystallization anneal may use a temperature less than that of the previous activation anneal.