公开(公告)号：US20070184794A1

公开(公告)日：2007-08-09

申请号：US11669648

申请日：2007-01-31

Applicant: Serge Drogi ,  Vikas Vinayak ,  Mark Gehring ,  Cary Renzema ,  Jeremy Lubkin

Inventor： Serge Drogi ,  Vikas Vinayak ,  Mark Gehring ,  Cary Renzema ,  Jeremy Lubkin

IPC: H04B1/04 ,  H01Q11/12

CPC classification number: H03F1/0205 ,  H03F1/0227 ,  H03F1/0238 ,  H03F1/3247 ,  H03F3/24 ,  H03F2200/451 ,  H03F2200/78 ,  H03F2200/99 ,  H03G3/004 ,  H03G3/3042 ,  H04B2001/0408

Abstract: An RF power amplifier system comprises an amplitude control loop and a phase control loop. The amplitude control loop adjusts the supply voltage to the power amplifier based upon the amplitude correction signal indicating the amplitude difference between the amplitude of the input signal and an attenuated amplitude of the output signal. The phase control loop adjusts the phase of the input signal based upon a phase error signal indicating a phase difference between phases of the input signal and the output signal. The phase control loop may comprise one or more variable phase delays introducing a relative phase delay to allow the phase differences between the input and output signals of the PA circuit to be within a range compatible with a phase comparator generating the phase error signal, and a low frequency blocking module that removes the larger extent, lower frequency components of the phase error signal.

Abstract translation: RF功率放大器系统包括幅度控制环路和相位控制环路。 幅度控制环路基于表示输入信号的振幅与输出信号的衰减幅度之间的振幅差的振幅校正信号，调整功率放大器的电源电压。 相位控制环路基于表示输入信号的相位与输出信号的相位差的相位误差信号来调整输入信号的相位。 相位控制回路可以包括引入相对相位延迟的一个或多个可变相位延迟，以允许PA电路的输入和输出信号之间的相位差在与产生相位误差信号的相位比较器兼容的范围内，以及 低频阻塞模块可以消除较大的程度，降低频率分量的相位误差信号。

公开(公告)号：US20070069829A1

公开(公告)日：2007-03-29

申请号：US11465439

申请日：2006-08-17

Applicant: MARK GEHRING

Inventor： MARK GEHRING

IPC: H03B5/32

CPC classification number: H03B5/32 ,  H03B5/06 ,  H03B2200/0094 ,  H03L7/00

Abstract: A method and system for initiating the oscillation of a crystal that controls a crystal oscillator by applying an initiating pulse to said crystal. The initiating pulse having a pulse width less than one half the periodicity of said crystal.

Abstract translation: 一种用于通过向所述晶体施加起始脉冲来启动控制晶体振荡器的晶体的振荡的方法和系统。 该起始脉冲的脉冲宽度小于所述晶体周期的一半。

公开(公告)号：US20070046368A1

公开(公告)日：2007-03-01

申请号：US11467067

申请日：2006-08-24

Applicant: Mark Gehring ,  Joseph Stenger

Inventor： Mark Gehring ,  Joseph Stenger

IPC: H03F3/191

CPC classification number: H03F3/191 ,  H03F3/45475 ,  H03F2200/453 ,  H03F2203/45288

Abstract: Systems and method for tracking different types of transconductance cells is shown and described. In these multi-cell systems, the addition of one or more tracking control modules allows circuit designers to advantageously incorporate multiple transconductor topologies and their uniquely beneficial characteristics into their designs, without eradicating its centralized multi-cell tuning functionality.

Abstract translation: 示出并描述了用于跟踪不同类型的跨导单元的系统和方法。 在这些多单元系统中，添加一个或多个跟踪控制模块允许电路设计者有利地将多个跨导体拓扑及其独特的有益特征结合到其设计中，而无需消除其集中的多单元调谐功能。

公开(公告)号：US07109763B1

公开(公告)日：2006-09-19

申请号：US10796873

申请日：2004-03-08

Applicant: Nathan Moyal ,  Eric Mitchell ,  Mark Gehring

Inventor： Nathan Moyal ,  Eric Mitchell ,  Mark Gehring

IPC: H03L7/00

CPC classification number: H03L7/183 ,  H03L7/099 ,  H03L7/10 ,  H03L2207/06

Abstract: A Phase Locked Loop (PLL) that has a substantially constant gain over a wide frequency range. The frequency range over which the PLL operates is divided into a number of frequency sub-ranges. The circuit includes a mechanism for adjusting the loop gain profile as the PLL moves from one frequency sub-range to another. When the PLL switches to a new frequency sub-range, the loop gain profile is adjusted to a pre-established value. Changes of frequency within each sub-range are then accomplished with the loop gain varying within a pre-established range.

Abstract translation: 锁相环（PLL），其在宽频率范围内具有基本恒定的增益。 PLL操作的频率范围被分为多个频率子范围。 该电路包括当PLL从一个频率子范围移动到另一个频率子范围时调整环路增益曲线的机构。 当PLL切换到新的频率子范围时，环路增益曲线调整到预先建立的值。 然后，在每个子范围内的频率变化，其中环路增益在预先建立的范围内变化。