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公开(公告)号：US20240364129A1
公开(公告)日：2024-10-31
申请号：US18420547
申请日：2024-01-23
发明人： TAEJIN JEONG
IPC分类号： H02J7/00
CPC分类号： H02J7/007182
摘要： A charging control integrated circuit includes a direct charging circuit connected to an external system load, a first current limiting circuit connected between a first external battery and the direct charging circuit and operates in response to a first charging control signal, and a control circuit that controls the first charging control signal based on a system voltage corresponding to the external system load and a first battery voltage of the first external battery. When the external system load occurs while the first external battery is charged, the control circuit controls the first charging control signal so that a first voltage difference of the system voltage corresponding to the external system load and the first battery voltage of the first external battery is maintained at a reference level.
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公开(公告)号：US20240363989A1
公开(公告)日：2024-10-31
申请号：US18770206
申请日：2024-07-11
发明人： Jaehyeong Lee , Hyeokshin Kwon , Jaeho Shin , Taehwan Jang , Insu Jeon
摘要： A qubit memory of a quantum computer is provided. The qubit memory according to an embodiment includes a first readout unit, a first transmon, and a first data storage unit storing quantum information, and the first data storage unit includes a first superconducting waveguide layer, an insulating layer, and a superconductor layer sequentially stacked on a substrate. In one example, the first superconducting waveguide layer may include a superconducting resonator.
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公开(公告)号：US20240363679A1
公开(公告)日：2024-10-31
申请号：US18765887
申请日：2024-07-08
发明人： Boeun PARK , Yongsung KIM , Jeonggyu SONG , Jooho LEE
摘要： An anti-ferroelectric thin-film structure including a dielectric layer including an anti-ferroelectric phase of hafnium oxide; and an inserted layer in the dielectric layer, the inserted layer including an oxide. An electronic device to which the anti-ferroelectric thin-film structure has been applied may secure an operating voltage section with little hysteresis.
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公开(公告)号：US20240363678A1
公开(公告)日：2024-10-31
申请号：US18767018
申请日：2024-07-09
发明人： JUNGMIN PARK , HANJIN LIM , HYUNGSUK JUNG
CPC分类号： H01L28/55 , H01L28/65 , H01L28/75 , H10B12/482 , H01L28/82
摘要： A semiconductor device includes a capacitor. The capacitor includes a bottom electrode, a dielectric layer, and a top electrode that are sequentially stacked in a first direction. The dielectric layer includes a first dielectric layer and a second dielectric layer that are interposed between the bottom electrode and the top electrode and are stacked in the first direction. The first dielectric layer is anti-ferroelectric, and the second dielectric layer is ferroelectric. A thermal expansion coefficient of the first dielectric layer is greater than a thermal expansion coefficient of the second dielectric layer.
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15.发明公开公开(公告)号：US20240363633A1
公开(公告)日：2024-10-31
申请号：US18470684
申请日：2023-09-20
发明人： MYUNG YANG , Seungchan YUN , Sooyoung Park , Jaehong Lee , KANG-ILL SEO
IPC分类号： H01L27/092 , H01L21/822 , H01L21/8238 , H01L29/06 , H01L29/423 , H01L29/66 , H01L29/775 , H01L29/786
CPC分类号： H01L27/0922 , H01L21/8221 , H01L21/823807 , H01L29/0673 , H01L29/42392 , H01L29/66439 , H01L29/775 , H01L29/78696 , H03K17/687
摘要： Integrated circuit devices and methods of forming the same are provided. The integrated circuit devices may include a transistor on a substrate. The transistor may include: a pair of thin semiconductor layers spaced apart from each other; a channel region between the pair of thin semiconductor layers; a gate electrode on the pair of thin semiconductor layers and the channel region; and a gate insulator separating the gate electrode from both the pair of thin semiconductor layers and the channel region. A side surface of the channel region may be recessed with respect to side surfaces of the pair of thin semiconductor layers and may define a recess between the pair of thin semiconductor layers. A portion of the gate insulator and/or a portion of the gate electrode may be in the recess.
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公开(公告)号：US20240363581A1
公开(公告)日：2024-10-31
申请号：US18622131
申请日：2024-03-29
发明人： Daewoong Heo
IPC分类号： H01L23/00
CPC分类号： H01L24/78 , H01L24/48 , H01L24/745 , H01L2224/48091 , H01L2224/48227 , H01L2224/48465 , H01L2224/745 , H01L2224/78611
摘要： A capilary of a wire bonding apparatus including: a body having a wire hole formed in an inner central region of the body and through a length of the body, and a wire discharge portion disposed at a lower end portion of the body and including an injection hole in an outer circumference of the wire discharge portion.
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公开(公告)号：US20240363552A1
公开(公告)日：2024-10-31
申请号：US18768684
申请日：2024-07-10
发明人： Chulsoon CHANG , Sangki KIM , Ilgeun JUNG , Junghoon HAN
IPC分类号： H01L23/00 , H01L21/768
CPC分类号： H01L23/562 , H01L21/76877
摘要： A semiconductor device may include a semiconductor substrate, a crack-blocking layer and a crack-blocking portion. The semiconductor substrate may include a plurality of chip regions and a scribe lane region configured to surround each of the plurality of the chip regions. A trench may be defined by one or more inner surfaces of the semiconductor device to be formed in the scribe lane region. The crack-blocking layer may be on an inner surface of the trench. The crack-blocking layer may be configured to block a spreading of a crack, which is generated in the scribe lane region during a cutting of the semiconductor substrate along the scribe lane region, from spreading into any of the chip regions. The crack-blocking portion may at least partially fill the trench and may be configured to block the spreading of the crack from the scribe lane region into any of the chip regions.
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公开(公告)号：US20240363526A1
公开(公告)日：2024-10-31
申请号：US18421431
申请日：2024-01-24
发明人： Kyuhoon CHOI , Seungseok HA , Seowoo NAM
IPC分类号： H01L23/522 , H01L23/528 , H01L23/544 , H10B12/00 , H10B41/30 , H10B41/42 , H10B43/30 , H10B43/40
CPC分类号： H01L23/5226 , H01L23/5283 , H01L23/544 , H10B12/09 , H10B12/50 , H10B41/30 , H10B41/42 , H10B43/30 , H10B43/40 , H01L2223/54426
摘要： A semiconductor device according to some example embodiments may include: a substrate having a first region and a second region; a lower interlayer insulating layer on the first region and the second region of the substrate; an upper interlayer insulating layer on the lower interlayer insulating layer; a via structure penetrating through the upper interlayer insulating layer in the first region; a plurality of metal wirings extending in a first direction on the via structure and electrically connected to the via structure; trenches on a same level as that of the via structure and in the upper interlayer insulating layer, in the second region; and a dummy wiring layer having a curved structure along upper surfaces of the trenches, the upper interlayer insulating layer, and the lower interlayer insulating layer.
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公开(公告)号：US20240363085A1
公开(公告)日：2024-10-31
申请号：US18769031
申请日：2024-07-10
发明人： Seungyong SHIN , Kyehoon LEE , Sungyeol KIM , Jonghoon JUNG
IPC分类号： G09G3/36
CPC分类号： G09G3/3607 , G09G2310/08 , G09G2320/0233 , G09G2320/0271
摘要： A display device, which fixes the magnitude of a driving current flowing through light-emitting devices in a low luminance region and controls an application period of the driving current, includes: light-emitting devices; a processor for controlling the light-emitting devices on the basis of a gray level required for the light-emitting devices in each unit frame; and a timing controller which divides the unit frame into a plurality of sub-frames and generates a scan signal corresponding to each sub-frame. The processor: when the gray level is greater than or equal to a preset value, determines a luminance value of the light-emitting devices on the basis of the gray level and turns on the light-emitting devices with the determined luminance value in all of the plurality of sub-frames; when the gray level is less than the preset value, determines a light-emitting period of the light-emitting devices on the basis of the gray level and divides, on the basis of the light-emitting period, the plurality of sub-frames into a first and a second sub-frame group; turns on the light-emitting devices with a preset luminance value in all sub-frames belonging to the first sub-frame group; and turns off the light-emitting devices in sub-frames belonging to the second sub-frame group or turns on the light-emitting devices with a luminance value less than the preset luminance value.
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公开(公告)号：US20240363045A1
公开(公告)日：2024-10-31
申请号：US18768766
申请日：2024-07-10
发明人： Seungho PARK , Guiwon SEO
CPC分类号： G09G3/007 , G09G3/32 , G09G2320/0257 , G09G2320/045 , G09G2320/046
摘要： A display apparatus including a display, a memory configured to store moving trajectory information related to a plurality of moving trajectories, and a processor configured to control the display to display a specific pixel which is pixel-shifted according to a first moving trajectory among the plurality of moving trajectories in a plurality of image frames included in a first frame interval. The processor, based on completing of the specific pixel being pixel-shifted according to the first moving trajectory, moves the specific pixel located at a starting point of the first moving trajectory by pixel units in any one of a vertical direction and a horizontal direction, and control the display to display the specific pixel by being pixel-shifted according to a second moving trajectory among the plurality of moving trajectories in a plurality of image frames included in a second frame interval.
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