公开(公告)号：US20050099758A1

公开(公告)日：2005-05-12

申请号：US10695153

申请日：2003-10-28

申请人： Peter Kellerman ,  Shu Qin ,  Ernie Allen ,  Douglas Brown

发明人： Peter Kellerman ,  Shu Qin ,  Ernie Allen ,  Douglas Brown

IPC分类号： H01L21/683 ,  H02B1/00

CPC分类号： H01L21/6833

摘要： The present invention is directed to a method of forming a clamping plate for a multi-polar electrostatic chuck. The method comprises forming a first electrically conductive layer over a semiconductor platform and defining a plurality of portions of the first electrically conductive layer which are electrically isolated from one another. A first electrically insulative layer is formed over the first electrically conductive layer, the first electrically insulative layer comprising a top surface having a plurality of MEMS protrusions extending a first distance therefrom. A plurality of poles are furthermore electrically connected to the respective plurality of portions of the first electrically conductive layer, wherein a voltage applied between the plurality of poles is operable to induce an electrostatic force in the clamping plate.

摘要翻译： 本发明涉及一种形成多极静电卡盘夹紧板的方法。 该方法包括在半导体平台上形成第一导电层，并且限定彼此电隔离的第一导电层的多个部分。 第一电绝缘层形成在第一导电层之上，第一电绝缘层包括具有从其延伸第一距离的多个MEMS突起的顶表面。 多个极还电连接到第一导电层的相应多个部分，其中施加在多个极之间的电压可操作以在夹持板中引起静电力。

公开(公告)号：US20050052817A1

公开(公告)日：2005-03-10

申请号：US10657449

申请日：2003-09-08

申请人： Peter Kellerman ,  Shu Qin ,  William DiVergilio

发明人： Peter Kellerman ,  Shu Qin ,  William DiVergilio

IPC分类号： H01L21/683 ,  H02N13/00 ,  H01H1/00

CPC分类号： H01L21/6833 ,  H02N13/00

摘要： The present invention is directed to a method for clamping a wafer to an electrostatic chuck using a single-phase square wave AC clamping voltage. The method comprises determining a single-phase square wave clamping voltage for the electrostatic chuck, wherein the determination is based, at least in part, on an inertial response time of the wafer. The wafer is placed on the electrostatic chuck, wherein a gap between the electrostatic chuck and the wafer is defined. The determined single-phase square wave clamping voltage is then applied, wherein the wafer is generally clamped to the electrostatic chuck within a predetermined distance, while an amount of electrostatic charge is generally not allowed to accumulate, thereby enabling a fast de-clamping of the wafer.

摘要翻译： 本发明涉及使用单相方波交流钳位电压将晶片夹持到静电卡盘的方法。 该方法包括确定用于静电卡盘的单相方波钳位电压，其中所述确定至少部分地基于晶片的惯性响应时间。 将晶片放置在静电卡盘上，其中定义静电卡盘和晶片之间的间隙。 然后施加确定的单相方波钳位电压，其中晶片通常在预定距离内被夹持在静电卡盘上，而静电电荷的量通常不允许累积，从而能够快速地去夹紧 晶圆。

公开(公告)号：US5874307A

公开(公告)日：1999-02-23

申请号：US492585

申请日：1995-06-20

申请人： Tadao Ohno ,  Shu Qin Liu ,  Takeshi Todoroki

发明人： Tadao Ohno ,  Shu Qin Liu ,  Takeshi Todoroki

IPC分类号： A61K35/12 ,  A61K35/14 ,  A61K35/26 ,  A61K35/28 ,  A61K39/00 ,  A61P35/00 ,  C12N5/0783 ,  C12N5/08 ,  C12N5/00

CPC分类号： A61K39/0011 ,  C12N5/0636 ,  A61K2039/5158 ,  C12N2501/23 ,  C12N2501/24

摘要： A process for an induction culture of a cytotoxic T lymphocyte having cell killing activities against a tumor cell which comprises the step of coculturing a tumor tissue containing said tumor cell and a lymphocyte of autologous peripheral blood obtained from a subject from which the tumor tissue is derived. The process is convenient since no separation and pure culture of tumor cells is required. The resulting cytotoxic T lymphocyte cells are useful for clinical treatments of tumors, e.g. adoptive immunotherapies.

摘要翻译： 一种对肿瘤细胞具有细胞杀伤活性的细胞毒性T淋巴细胞的诱导培养的方法，其包括共培养含有所述肿瘤细胞的肿瘤组织和获自肿瘤组织衍生的受试者的自体外周血的淋巴细胞的步骤 。 该方法方便，因为不需要分离和纯化培养细胞。 所得的细胞毒性T淋巴细胞可用于肿瘤的临床治疗，例如 过继性免疫治疗。

公开(公告)号：US20130089966A1

公开(公告)日：2013-04-11

申请号：US13267522

申请日：2011-10-06

申请人： Shu Qin ,  Ming Zhang

发明人： Shu Qin ,  Ming Zhang

IPC分类号： H01L21/263

CPC分类号： H01L21/68735 ,  H01L21/6831 ,  H01L21/76254

摘要： Some embodiments include methods of processing a unit containing crystalline material. A damage region may be formed within the crystalline material, and a portion of the unit may be above the damage region. A chuck may be used to bend the unit and thereby induce cleavage along the damage region to form a structure from the portion of the unit above the damage region. Some embodiments include methods of forming semiconductor-on-insulator constructions. A unit may be formed to have dielectric material over monocrystalline semiconductor material. A damage region may be formed within the monocrystalline semiconductor material, and a portion of the monocrystalline semiconductor material may be between the damage region and the dielectric material. The unit may be incorporated into an assembly with a handle component, and a chuck may be used to contort the assembly and thereby induce cleavage along the damage region.

摘要翻译： 一些实施方案包括处理含有结晶材料的单元的方法。 可以在结晶材料内形成损伤区域，并且该单元的一部分可能在损伤区域之上。 可以使用卡盘来弯曲单元，从而沿着损伤区域引起切割，以从损伤区域上方的单元部分形成结构。 一些实施例包括形成绝缘体上半导体结构的方法。 单元可以形成为具有超过单晶半导体材料的电介质材料。 可以在单晶半导体材料内形成损伤区域，并且单晶半导体材料的一部分可以在损伤区域和电介质材料之间。 该单元可以结合到具有把手部件的组件中，并且卡盘可以用于扭曲组件，从而引起沿着损伤区域的切割。

公开(公告)号：US08054637B2

公开(公告)日：2011-11-08

申请号：US12327473

申请日：2008-12-03

申请人： Zhong-Shu Qin ,  Hsiao-Hua Tu ,  Wen-Wei Song ,  Jun Wang ,  Ye Liu ,  Xu-Ri Zhang

发明人： Zhong-Shu Qin ,  Hsiao-Hua Tu ,  Wen-Wei Song ,  Jun Wang ,  Ye Liu ,  Xu-Ri Zhang

IPC分类号： H05K1/14

CPC分类号： G06K13/08 ,  G06K13/0806

摘要： A electronic device (100) includes a removable chip card (40) for carrying information, comprise a housing (10) and a ejecting mechanism (30). The housing (10) defines a chamber (12) and a base (14) formed adjacent to the chamber. The chamber (12) is used for accommodating a battery (20) therein. The base (14) is used for receiving the chip card (40) therewith. The ejecting mechanism (30) is mounted in the housing (10) and includes a sliding member (32) and an elastic member (36). When the battery (20) is accommodated in the chamber (12), the chip card (40) is secured between the sliding member (32) and the battery (20). When the battery (20) is removed from the chamber (12), the elastic member (36) biases the sliding member (32) to eject the chip card (40) outwardly from the base (14).

摘要翻译： 一种电子设备（100）包括用于传送信息的可拆卸芯片卡（40），包括壳体（10）和弹出机构（30）。 壳体（10）限定了邻近腔室形成的腔室（12）和底座（14）。 室（12）用于在其中容纳电池（20）。 基座（14）用于接收芯片卡（40）。 排出机构（30）安装在壳体（10）中并且包括滑动构件（32）和弹性构件（36）。 当电池（20）容纳在腔室（12）中时，芯片卡片（40）被固定在滑动构件（32）和电池（20）之间。 当电池（20）从腔室（12）中取出时，弹性部件（36）偏压滑动部件（32），从芯片（14）向外弹出芯片卡片（40）。

公开(公告)号：US08032194B2

公开(公告)日：2011-10-04

申请号：US12133497

申请日：2008-06-05

申请人： Ye Liu ,  Hsiao-Hua Tu ,  Xin-Quan Zhou ,  Zhong-Shu Qin ,  Xu-Ri Zhang

发明人： Ye Liu ,  Hsiao-Hua Tu ,  Xin-Quan Zhou ,  Zhong-Shu Qin ,  Xu-Ri Zhang

IPC分类号： H04M1/00 ,  H04K3/00

CPC分类号： H04M1/0249 ,  H04M1/18

摘要： A housing (10) of a portable electronic device includes an upper housing (11), a lower housing (12) and a protecting component (13). The upper housing defines a first latching member (1112) therein. The lower housing defines a second latching member (121) therein. The protecting component is assembled between the upper housing and the lower housing for preventing dust and vapor from entering the electronic device and defines a first latching portion (1313) corresponding to the first latching member and a second latching portion (1314) corresponding to the second latching member. The first latching portion and the second latching member respectively cooperate with the first latching member and the second latching member to assemble the upper housing, the lower housing and the protecting component together.

摘要翻译： 便携式电子设备的壳体（10）包括上壳体（11），下壳体（12）和保护部件（13）。 上壳体在其中限定第一闩锁构件（1112）。 下壳体在其中限定第二闩锁构件（121）。 保护部件组装在上壳体和下壳体之间，用于防止灰尘和蒸气进入电子装置并且限定对应于第一闩锁构件的第一闩锁部分（1313）和对应于第二闩锁部分的第二闩锁部分（1314） 锁定构件。 第一锁定部分和第二闩锁部件分别与第一闩锁部件和第二闩锁部件配合，以将上壳体，下壳体和保护部件组装在一起。

公开(公告)号：US07737010B2

公开(公告)日：2010-06-15

申请号：US11404306

申请日：2006-04-14

申请人： Shu Qin ,  Allen McTeer ,  Robert J. Hanson

发明人： Shu Qin ,  Allen McTeer ,  Robert J. Hanson

IPC分类号： H01L21/26

CPC分类号： H01L21/2236 ,  H01L21/31133 ,  H01L21/31138 ,  H01L29/78

摘要： A method of forming an intermediate semiconductor device is disclosed that comprises providing a semiconductor substrate, forming a photoresist layer on the semiconductor substrate, implanting a dopant into the semiconductor substrate, and removing a dopant-containing layer from the photoresist layer. The dopant-containing layer includes dopant residuals and a carbon-rich crust and may be formed during implantation. The dopant-containing layer may be removed from the photoresist layer by exposing the dopant-containing layer to a water rinse, a chlorinated plasma or to a fluorinated plasma. The water rinse may include deionized water that is maintained at a temperature that ranges from approximately 25° C. to approximately 80° C. The fluorinated plasma may be formed from a gaseous precursor selected from the group consisting of nitrogen trifluoride, carbon tetrafluoride, trifluoromethane, hexafluoroethane, sulfur hexafluoride, and mixtures thereof. A method of forming an ultrashallow junction is also disclosed.

摘要翻译： 公开了一种形成中间半导体器件的方法，其包括提供半导体衬底，在半导体衬底上形成光致抗蚀剂层，将掺杂剂注入到半导体衬底中，以及从光刻胶层去除掺杂剂层。 含掺杂剂层包括掺杂剂残留物和富含碳的地壳，并且可以在植入期间形成。 通过将含掺杂剂的层暴露于水漂洗，氯化等离子体或氟化等离子体，可以从光致抗蚀剂层中除去含掺杂物层。 水冲洗可以包括保持在约25℃至约80℃范围内的温度的去离子水。氟化等离子体可以由选自三氟化氮，四氟化碳，三氟甲烷 六氟乙烷，六氟化硫及其混合物。 还公开了形成超短接头的方法。

公开(公告)号：US07476556B2

公开(公告)日：2009-01-13

申请号：US11201668

申请日：2005-08-11

申请人： Shu Qin ,  Allen McTeer

发明人： Shu Qin ,  Allen McTeer

IPC分类号： H01L21/66 ,  H01L21/00

CPC分类号： H01J37/32917 ,  C23C14/54 ,  C23C16/52 ,  G01N21/73 ,  H01J37/32935 ,  H01J37/32972

摘要： Systems and methods for plasma processing of microfeature workpieces are disclosed herein. In one embodiment, a method includes generating a plasma in a chamber while a microfeature workpiece is positioned in the chamber, measuring optical emissions from the plasma, and determining a parameter of the plasma based on the measured optical emissions. The parameter can be an ion density or another parameter of the plasma.

摘要翻译： 本文公开了微型工件的等离子体处理的系统和方法。 在一个实施例中，一种方法包括在微型工件位于腔室中的同时在腔室中产生等离子体，测量等离子体的光发射，以及基于所测量的光发射来确定等离子体的参数。 该参数可以是等离子体的离子密度或其他参数。

公开(公告)号：US20070284686A1

公开(公告)日：2007-12-13

申请号：US11449743

申请日：2006-06-09

申请人： Saijin Liu ,  Shu Qin

发明人： Saijin Liu ,  Shu Qin

IPC分类号： H01L31/0232

CPC分类号： H01L27/14634 ,  H01L21/76254 ,  H01L27/1469

摘要： Elevated crystal silicon photosensors for imagers pixels, each photosensor formed of crystal silicon above the surface of a substrate that has pixel circuitry formed thereon. The imager has a high fill factor and good imaging properties due to the crystal silicon photosensor.

摘要翻译： 用于成像器像素的升高的晶体硅光电传感器，每个光电传感器由其上形成有像素电路的衬底表面上的晶体硅形成。 由于晶体硅光电传感器，成像器具有高填充因子和良好的成像性能。

公开(公告)号：US20070243700A1

公开(公告)日：2007-10-18

申请号：US11404306

申请日：2006-04-14

申请人： Shu Qin ,  Allen McTeer ,  Robert Hanson

发明人： Shu Qin ,  Allen McTeer ,  Robert Hanson

IPC分类号： H01L21/426

CPC分类号： H01L21/2236 ,  H01L21/31133 ,  H01L21/31138 ,  H01L29/78

摘要： A method of forming an intermediate semiconductor device is disclosed that comprises providing a semiconductor substrate, forming a photoresist layer on the semiconductor substrate, implanting a dopant into the semiconductor substrate, and removing a dopant-containing layer from the photoresist layer. The dopant-containing layer includes dopant residuals and a carbon-rich crust and may be formed during implantation. The dopant-containing layer may be removed from the photoresist layer by exposing the dopant-containing layer to a water rinse, a chlorinated plasma or to a fluorinated plasma. The water rinse may include deionized water that is maintained at a temperature that ranges from approximately 25° C. to approximately 80° C. The fluorinated plasma may be formed from a gaseous precursor selected from the group consisting of nitrogen trifluoride, carbon tetrafluoride, trifluoromethane, hexafluoroethane, sulfur hexafluoride, and mixtures thereof. A method of forming an ultrashallow junction is also disclosed.

摘要翻译： 公开了一种形成中间半导体器件的方法，其包括提供半导体衬底，在半导体衬底上形成光致抗蚀剂层，将掺杂剂注入到半导体衬底中，以及从光刻胶层去除掺杂剂层。 含掺杂剂层包括掺杂剂残留物和富含碳的地壳，并且可以在植入期间形成。 通过将含掺杂剂的层暴露于水漂洗，氯化等离子体或氟化等离子体，可以从光致抗蚀剂层中除去含掺杂物层。 水冲洗可以包括保持在约25℃至约80℃范围内的温度的去离子水。氟化等离子体可以由选自三氟化氮，四氟化碳，三氟甲烷 六氟乙烷，六氟化硫及其混合物。 还公开了形成超短接头的方法。