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13.发明申请METHOD OF FORMING VIAS IN SILICON CARBIDE AND RESULTING DEVICES AND CIRCUITS 有权在碳化硅和结晶器件和电路中形成VIAS的方法公开(公告)号：US20110165771A1
公开(公告)日：2011-07-07
申请号：US13021833
申请日：2011-02-07
IPC分类号： H01L21/28
CPC分类号： H01L29/452 , H01L21/30604 , H01L21/3081 , H01L21/445 , H01L21/76898 , H01L29/1608 , H01L29/2003 , H01L29/4175 , H01L29/7787 , H01L29/812
摘要： A method of fabricating an integrated circuit on a silicon carbide substrate is disclosed that eliminates wire bonding. The method includes fabricating a semiconductor device in epitaxial layers on a surface of a silicon carbide substrate and with at least one metal contact for the device on the uppermost surface of the epitaxial layer. The opposite surface of the substrate is then ground and polished until it is substantially transparent. The polished surface of the silicon carbide substrate is then masked to define a predetermined location for at least one via that is opposite the device metal contact and etching the desired via in steps. The first etching step etches through the silicon carbide substrate at the desired masked location until the etch reaches the epitaxial layer. The second etching step etches through the epitaxial layer to the device contacts. Finally, the via is metallized.
摘要翻译： 公开了一种在碳化硅衬底上制造集成电路的方法，其消除引线接合。 该方法包括在硅碳化物衬底的表面上制造外延层中的半导体器件，并且在外延层的最上表面上具有用于器件的至少一个金属接触。 然后将基板的相对表面研磨抛光直到基本透明。 然后对碳化硅衬底的抛光表面进行掩模，以限定与设备金属接触相对的至少一个通孔的预定位置，并在步骤中蚀刻所需的通孔。 第一蚀刻步骤在期望的掩蔽位置上蚀刻通过碳化硅衬底，直到蚀刻到达外延层。 第二蚀刻步骤通过外延层蚀刻到器件触点。 最后，通孔被金属化。
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14.发明申请公开(公告)号：US20090215280A1
公开(公告)日：2009-08-27
申请号：US12404557
申请日：2009-03-16
申请人： Zoltan Ring , Helmut Hagleitner , Jason Patrick Henning , Andrew Mackenzie , Scott Allen , Scott Thomas Sheppard , Richard Peter Smith , Saptharishi Sriram , Allan Ward, III
发明人： Zoltan Ring , Helmut Hagleitner , Jason Patrick Henning , Andrew Mackenzie , Scott Allen , Scott Thomas Sheppard , Richard Peter Smith , Saptharishi Sriram , Allan Ward, III
IPC分类号： H01L21/04
CPC分类号： H01L21/045 , H01L21/3145 , H01L21/318 , H01L21/3185 , H01L29/1608 , H01L29/2003 , H01L29/24
摘要： A passivated semiconductor structure and associated method are disclosed. The structure includes a silicon carbide substrate or layer; an oxidation layer on the silicon carbide substrate for lowering the interface density between the silicon carbide substrate and the thermal oxidation layer; a first sputtered non-stoichiometric silicon nitride layer on the thermal oxidation layer for reducing parasitic capacitance and minimizing device trapping; a second sputtered non-stoichiometric silicon nitride layer on the first layer for positioning subsequent passivation layers further from the substrate without encapsulating the structure; a sputtered stoichiometric silicon nitride layer on the second sputtered layer for encapsulating the structure and for enhancing the hydrogen barrier properties of the passivation layers; and a chemical vapor deposited environmental barrier layer of stoichiometric silicon nitride for step coverage and crack prevention on the encapsulant layer.
摘要翻译： 公开了钝化的半导体结构和相关方法。 该结构包括碳化硅衬底或层; 在碳化硅衬底上的氧化层，用于降低碳化硅衬底和热氧化层之间的界面密度; 在热氧化层上的第一溅射的非化学计量的氮化硅层，用于减少寄生电容并最小化器件捕获; 在所述第一层上的第二溅射的非化学计量的氮化硅层，用于使所述衬底进一步从所述衬底定位以后的钝化层而不封装所述结构; 在第二溅射层上溅射化学计量的氮化硅层，用于封装该结构并增强钝化层的氢阻挡性能; 以及化学气相沉积的化学计量氮化硅的环境阻挡层，用于在封装层上进行步骤覆盖和防裂。
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15.发明授权公开(公告)号：US06316793B1
公开(公告)日：2001-11-13
申请号：US09096967
申请日：1998-06-12
IPC分类号： H01L3300
CPC分类号： H01L29/1608 , H01L29/2003 , H01L29/267 , H01L29/452 , H01L29/7783 , H01L29/7787
摘要： A high electron mobility transistor (HEMT) is disclosed that includes a semi-insulating silicon carbide substrate, an aluminum nitride buffer layer on the substrate, an insulating gallium nitride layer on the buffer layer, an active structure of aluminum gallium nitride on the gallium nitride layer, a passivation layer on the aluminum gallium nitride active structure, and respective source, drain and gate contacts to the aluminum gallium nitride active structure.
摘要翻译： 公开了一种高电子迁移率晶体管（HEMT），其包括半绝缘碳化硅衬底，衬底上的氮化铝缓冲层，缓冲层上的绝缘氮化镓层，氮化镓上的氮化镓铝的有源结构 层，在氮化铝镓活性结构上的钝化层，以及与氮化镓铝活性结构相应的源极，漏极和栅极接触。
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16.发明授权Method of forming vias in silicon carbide and resulting devices and circuits 有权在碳化硅和所产生的器件和电路中形成通孔的方法公开(公告)号：US09490169B2
公开(公告)日：2016-11-08
申请号：US12917828
申请日：2010-11-02
IPC分类号： H01L29/12 , H01L21/768 , H01L29/417 , H01L29/778 , H01L29/812 , H01L21/445 , H01L29/16 , H01L29/20 , H01L29/45
CPC分类号： H01L29/452 , H01L21/30604 , H01L21/3081 , H01L21/445 , H01L21/76898 , H01L29/1608 , H01L29/2003 , H01L29/4175 , H01L29/7787 , H01L29/812
摘要： A method of fabricating an integrated circuit on a silicon carbide substrate is disclosed that eliminates wire bonding that can otherwise cause undesired inductance. The method includes fabricating a semiconductor device including a Group III-V semiconductor layer on a surface on a silicon carbide substrate, wherein the semiconductor device defines at least one via through the silicon carbide substrate and the epitaxial layer.
摘要翻译： 公开了一种在碳化硅衬底上制造集成电路的方法，其消除了否则会导致不期望的电感的引线接合。 该方法包括在碳化硅衬底的表面上制造包括III-V族半导体层的半导体器件，其中半导体器件限定通过碳化硅衬底和外延层的至少一个通孔。
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公开(公告)号：US20070000198A1
公开(公告)日：2007-01-04
申请号：US11170738
申请日：2005-06-30
申请人： Stephen Payne , Kurt Goodfriend , David McDonald , Dennis Socha , John Ellicson , Francis Laux , Russell Dombeck , Thomas Sheppard
发明人： Stephen Payne , Kurt Goodfriend , David McDonald , Dennis Socha , John Ellicson , Francis Laux , Russell Dombeck , Thomas Sheppard
摘要： The present invention relates to a sound rated floor system for inhibiting sound transmission between floors. The system includes a corrugated steel deck; a first layer of cementitious material or board or sheet applied over the corrugated steel deck; a sound insulation mat or board applied over the first layer; a second layer of cementitious material applied over the sound insulation mat or board. The floor system has an IIC rating of at least 25 and the corrugated steel deck provides at least 50 percent of the ultimate load carrying capacity under static and impact loading of the floor system with a floor deflection of at most 1/360 of the floor span.
摘要翻译： 本发明涉及一种用于抑制楼层之间的声音传播的声级楼层系统。 该系统包括波纹钢甲板; 施加在波纹钢甲板上的第一层水泥质材料或板或板; 在第一层上施加隔音垫或板; 在隔音垫或板上施加第二层水泥质材料。 地板系统的IIC等级至少为25，波纹钢甲板在地板系统的静态和冲击载荷下提供至少50％的极限承载能力，地板挠度最大为地板跨度的1/360 。
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