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    SHALLOW TRENCH DIVOT CONTROL POST
    11.
    发明申请
    SHALLOW TRENCH DIVOT CONTROL POST 审中-公开

    公开(公告)号：US20080268589A1

    公开(公告)日：2008-10-30

    申请号：US11742254

    申请日：2007-04-30

    Applicant: David Gerald Farber ,  Toan Tran ,  Craig Henry Huffman ,  Brian K. Kirkpatrick

    Inventor： David Gerald Farber ,  Toan Tran ,  Craig Henry Huffman ,  Brian K. Kirkpatrick

    IPC: H01L21/8238 ,  H01L29/76

    CPC classification number: H01L21/76232 ,  H01L21/823481

    Abstract: The disclosure provides a method of manufacturing a semiconductor device. The method comprises forming a shallow trench isolation structure, including performing a wet etch process to remove a patterned pad oxide layer located on a semiconductor substrate. The wet etch thereby produces a divot on upper lateral edges of a insulator-filled trench in the semiconductor substrate. Forming the shallow trench isolation structure also includes forming a nitride post on a vertical wall of the divot. Forming the nitride post includes depositing a nitride layer on the insulator, and dry etching the nitride layer. The dry etch is selective towards the nitride located adjacent the vertical wall such that a portion of the nitride layer remains on the vertical wall subsequent to the dry etching.

    Abstract translation: 本公开提供了制造半导体器件的方法。 该方法包括形成浅沟槽隔离结构，包括执行湿蚀刻工艺以去除位于半导体衬底上的图案化衬垫氧化物层。 因此，湿蚀刻在半导体衬底中的绝缘体填充沟槽的上侧边缘上产生凹陷。 形成浅沟槽隔离结构还包括在该凹陷的垂直壁上形成氮化物柱。 形成氮化物柱包括在绝缘体上沉积氮化物层，并干蚀刻氮化物层。 干蚀刻对位于垂直壁附近的氮化物是选择性的，使得在干蚀刻之后，氮化物层的一部分保留在垂直壁上。

    Feature game with random population feature
    12.
    发明申请
    Feature game with random population feature 有权
    具有随机人口特征的特征游戏

    公开(公告)号：US20060183533A1

    公开(公告)日：2006-08-17

    申请号：US11281258

    申请日：2005-11-17

    Applicant: Toan Tran ,  Ichiro Tsuchida

    Inventor： Toan Tran ,  Ichiro Tsuchida

    IPC: A63F13/00

    CPC classification number: G07F17/34 ,  G07F17/3267

    Abstract: A gaming machine arranged to display a symbol in each element of a matrix of elements; each column of elements of said matrix of elements comprising a portion of a simulated rotatable reel and wherein at an occurrence of a trigger event at end of play of a main game; (a) said main game is completed and any prize is awarded, (b) at least one feature game may be awarded wherein each said rotatable reel is caused to be spun and brought to rest to display elements of said matrix in a first stage; said first stage displaying symbols in elements of at least one said column and uniform imagery in elements of each remaining said column; said feature game then progressing to a further stage wherein elements with said uniform imagery are populated by symbols of said elements of said at least one column.

    Abstract translation: 布置成在元素矩阵的每个元素中显示符号的游戏机; 所述元件矩阵的每列元素包括模拟可旋转卷轴的一部分，并且其中在主游戏结束时发生触发事件; （a）所述主游戏完成并且任何奖品被授予，（b）可以授予至少一个特征游戏，其中使每个所述可旋转卷轴被旋转并使其休息以在第一阶段中显示所述矩阵的元素; 所述第一阶段在每个剩余的所述列的元素中显示至少一个所述列的元素中的符号和均匀的图像; 所述特征游戏然后进行到另一阶段，其中具有所述统一图像的元素由所述至少一列的所述元素的符号填充。

    Tool holder and method of placing the insert
    13.
    发明申请
    Tool holder and method of placing the insert 审中-公开
    刀架和放置刀片的方法

    公开(公告)号：US20060140729A1

    公开(公告)日：2006-06-29

    申请号：US11020823

    申请日：2004-12-27

    Applicant: Toan Tran

    Inventor： Toan Tran

    IPC: B23C5/00

    CPC classification number: B23B29/04 ,  B23B2200/28 ,  Y10T407/1906 ,  Y10T407/22

    Abstract: The outer diameter roughing in a CNC lathe turning process utilizes generally inserts with zero degree negative clearance angle (N−0 degree Negative) for economic purposes. The common roughing tool holder is using the diamond shape insert, the so called CN_or DN_insert. In a variation of these conventional tool holders only one corner (mostly 80/55 degree) of the insert is in cutting operation. The other corner (110/125 degree) could be reused in another tool holder.

    Abstract translation: 数控车床车削加工中的外径粗加工通常采用零度负间隙角（N-0度负）的插入件，用于经济目的。 普通的粗加工刀架采用金刚石形刀片，即所谓的CN_or DN_insert。 在这些常规刀架的变型中，刀片的一个角（大部分为80/55度）处于切割操作。 另一个角（110/125度）可以重新用于另一个工具架。

    Secure Information Storage and Delivery System and Method
    15.
    发明申请
    Secure Information Storage and Delivery System and Method 有权
    安全信息存储和交付系统和方法

    公开(公告)号：US20120131656A1

    公开(公告)日：2012-05-24

    申请号：US13350171

    申请日：2012-01-13

    Applicant: Jonathan SLATON ,  Ryan B. JOHNSON ,  Toan TRAN ,  David REED ,  Abhilash RAVINDRAN ,  George K. TSANTES

    Inventor： Jonathan SLATON ,  Ryan B. JOHNSON ,  Toan TRAN ,  David REED ,  Abhilash RAVINDRAN ,  George K. TSANTES

    IPC: G06F21/20

    CPC classification number: H04L63/08 ,  G06Q20/36 ,  G06Q40/025 ,  H04L63/0815 ,  H04L63/083 ,  H04L63/0838 ,  H04L2463/082 ,  H04W12/06 ,  H04W12/08

    Abstract: A system for secure information storage and delivery includes a vault repository that includes a secure vault associated with a user, wherein the secure vault is configured to receive at least one data entry. A mobile vault server coupled to the vault repository creates a mobile vault on a mobile device based on the secure vault and is capable of authenticating the mobile device based on user authentication information. The mobile vault server includes a mobile device handler that communicates with the mobile device. A synchronization utility determines whether the at least one data entry on the secure vault is transferable to or storable on the mobile vault. and transfers the data entry from the secure vault to a corresponding data entry on the mobile vault if the at least one data entry on the secure vault is determined to be transferable to or storable on the mobile vault.

    Abstract translation: 用于安全信息存储和传递的系统包括保管库存储库，其包括与用户相关联的安全保管库，其中所述安全保险库被配置为接收至少一个数据条目。 耦合到保管库存储库的移动保管库服务器基于安全保管库在移动设备上创建移动保管库，并且能够基于用户认证信息来认证移动设备。 移动保管库服务器包括与移动设备通信的移动设备处理程序。 同步实用程序确定安全保险库上的至少一个数据条目是否可转移到或可存储在移动存储库上。 并且如果所述安全保险库上的所述至少一个数据条目被确定为可转移到或可存储在所述移动存储库上，则将所述数据条目从所述安全保险库传送到所述移动存储库上的相应数据条目。

    Reliable high voltage gate dielectric layers using a dual nitridation process
    16.
    发明授权
    Reliable high voltage gate dielectric layers using a dual nitridation process 有权
    使用双重氮化工艺的可靠的高压栅极电介质层

    公开(公告)号：US07560792B2

    公开(公告)日：2009-07-14

    申请号：US11626624

    申请日：2007-01-24

    Applicant: Rajesh Khamankar ,  Douglas T. Grider ,  Hiroaki Niimi ,  April Gurba ,  Toan Tran ,  James J. Chambers

    Inventor： Rajesh Khamankar ,  Douglas T. Grider ,  Hiroaki Niimi ,  April Gurba ,  Toan Tran ,  James J. Chambers

    IPC: H01L27/105

    CPC classification number: H01L21/823462 ,  H01L21/28185 ,  H01L21/28202 ,  H01L21/3144 ,  H01L29/518

    Abstract: Dual gate dielectric layers are formed on a semiconductor substrate for MOS transistor fabrication. A first dielectric layer (30) is formed on a semiconductor substrate (10). A first plasma nitridation process is performed on said first dielectric layer. The first dielectric layer (30) is removed in regions of the substrate and a second dielectric layer (50) is formed in these regions. A second plasma nitridation process is performed on the first dielectric layer and the second dielectric layer. MOS transistors (160, 170) are then fabricated using the dielectric layers (30, 50).

    Abstract translation: 在用于MOS晶体管制造的半导体衬底上形成双栅介质层。 第一电介质层（30）形成在半导体衬底（10）上。 在所述第一介电层上进行第一等离子体氮化处理。 在衬底的区域中去除第一电介质层（30），并且在这些区域中形成第二电介质层（50）。 在第一电介质层和第二电介质层上进行第二等离子体氮化处理。 然后使用电介质层（30,50）制造MOS晶体管（160,170）。

    Reliable high voltage gate dielectric layers using a dual nitridation process
    17.
    发明授权
    Reliable high voltage gate dielectric layers using a dual nitridation process 有权
    使用双重氮化工艺的可靠的高压栅极电介质层

    公开(公告)号：US07183165B2

    公开(公告)日：2007-02-27

    申请号：US10702234

    申请日：2003-11-06

    Applicant: Rajesh Khamankar ,  Douglas T. Grider ,  Hiroaki Niimi ,  April Gurba ,  Toan Tran ,  James J. Chambers

    Inventor： Rajesh Khamankar ,  Douglas T. Grider ,  Hiroaki Niimi ,  April Gurba ,  Toan Tran ,  James J. Chambers

    IPC: H01L21/336

    CPC classification number: H01L21/823462 ,  H01L21/28185 ,  H01L21/28202 ,  H01L21/3144 ,  H01L29/518

    Abstract: Dual gate dielectric layers are formed on a semiconductor substrate for MOS transistor fabrication. A first dielectric layer (30) is formed on a semiconductor substrate (10). A first plasma nitridation process is performed on said first dielectric layer. The first dielectric layer (30) is removed in regions of the substrate and a second dielectric layer (50) is formed in these regions. A second plasma nitridation process is performed on the first dielectric layer and the second dielectric layer. MOS transistors (160, 170) are then fabricated using the dielectric layers (30, 50).

    Abstract translation: 在用于MOS晶体管制造的半导体衬底上形成双栅介质层。 第一电介质层（30）形成在半导体衬底（10）上。 在所述第一介电层上进行第一等离子体氮化处理。 在衬底的区域中去除第一电介质层（30），并且在这些区域中形成第二电介质层（50）。 在第一电介质层和第二电介质层上进行第二等离子体氮化处理。 然后使用电介质层（30,50）制造MOS晶体管（160,170）。

    Variable seal pressure slit valve doors for semiconductor manufacturing equipment
    18.
    发明申请
    Variable seal pressure slit valve doors for semiconductor manufacturing equipment 有权
    用于半导体制造设备的可变密封压力狭缝阀门

    公开(公告)号：US20050269334A1

    公开(公告)日：2005-12-08

    申请号：US10990125

    申请日：2004-11-16

    Applicant: Won Bang ,  Toan Tran ,  Yen-Kun Wang

    Inventor： Won Bang ,  Toan Tran ,  Yen-Kun Wang

    IPC: E05F11/38 ,  H01L21/00

    CPC classification number: H01L21/67126

    Abstract: Techniques for a door system for sealing an opening between two chambers in a semiconductor processing system are described. A sealing member seals the opening when a door is in a closed position. To selectively open and close the opening, an actuator moves the door. A valve actuator switch provides a first or second pressure to the actuator depending on the pressure inside a first chamber. In one embodiment, a sensor monitors the pressure inside the first chamber.

    Abstract translation: 描述了用于密封半导体处理系统中的两个室之间的开口的门系统的技术。 当门处于关闭位置时，密封构件密封开口。 为了选择性地打开和关闭开口，致动器移动门。 阀致动器开关根据第一室内的压力向致动器提供第一或第二压力。 在一个实施例中，传感器监测第一室内的压力。

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