公开(公告)号：US20110147864A1

公开(公告)日：2011-06-23

申请号：US12737037

申请日：2009-04-21

Applicant: Torsten Kramer ,  Marcus Ahles ,  Armin Grundmann ,  Kathrin Knese ,  Hubert Benzel ,  Gregor Schuermann ,  Simon Armbruster

Inventor： Torsten Kramer ,  Marcus Ahles ,  Armin Grundmann ,  Kathrin Knese ,  Hubert Benzel ,  Gregor Schuermann ,  Simon Armbruster

IPC: H01L21/302 ,  H01L29/84

CPC classification number: B81C1/00158 ,  B81B2201/0257 ,  B81B2201/0264 ,  B81C2201/0115 ,  B81C2201/0136 ,  G01L9/0042

Abstract: A method for manufacturing a micromechanical diaphragm structure having access from the rear of the substrate includes: n-doping at least one contiguous lattice-type area of a p-doped silicon substrate surface; porously etching a substrate area beneath the n-doped lattice structure; producing a cavity in this substrate area beneath the n-doped lattice structure; growing a first monocrystalline silicon epitaxial layer on the n-doped lattice structure; at least one opening in the n-doped lattice structure being dimensioned in such a way that it is not closed by the growing first epitaxial layer but instead forms an access opening to the cavity; an oxide layer being created on the cavity wall; a rear access to the cavity being created, the oxide layer on the cavity wall acting as an etch stop layer; and the oxide layer being removed in the area of the cavity.

Abstract translation: 用于制造从衬底的后部进入的微机械膜结构的方法包括：n掺杂p掺杂硅衬底表面的至少一个连续的格子型区域; 在n掺杂的晶格结构下面蚀刻衬底区域; 在该n型掺杂晶格结构下面的该衬底区域中产生空腔; 在n掺杂晶格结构上生长第一单晶硅外延层; n掺杂晶格结构中的至少一个开口的尺寸设计成使得其不被生长的第一外延层闭合​​，而是形成到腔的通路口; 在空腔壁上形成氧化物层; 产生到空腔的后部通路，空腔壁上的氧化层用作蚀刻停止层; 并且在空腔的区域中去除氧化物层。

公开(公告)号：US07989263B2

公开(公告)日：2011-08-02

申请号：US12584148

申请日：2009-08-31

Applicant: Torsten Kramer ,  Christoph Schelling ,  Christina Leinenbach

Inventor： Torsten Kramer ,  Christoph Schelling ,  Christina Leinenbach

IPC: H01L21/00

CPC classification number: B81C1/00095 ,  B81B2207/07 ,  B81C1/00626

Abstract: In a method for manufacturing a micromechanical chip, a sacrificial layer and an epitaxy layer are initially applied to a semiconductor substrate to produce a layer stack. An opening is subsequently introduced into the epitaxy layer from the front side of the layer stack. In order to electrically insulate the subsequent filling of the opening using a conductive contact layer from the material of the epitaxy layer, the walls of the opening are provided with an insulating layer. For removing the sacrificial layer and thus for producing the chip, separation trenches are subsequently etched through the epitaxy layer to the sacrificial layer also from the front side of the layer stack, which separation trenches also delimit the lateral extension of the chip.

Abstract translation: 在制造微机械芯片的方法中，牺牲层和外延层最初被施加到半导体衬底以产生层叠。 随后从层叠体的前侧将开口引入外延层。 为了利用来自外延层的材料的导电接触层来电绝缘开口的后续填充，开口的壁设置有绝缘层。 为了去除牺牲层并因此用于制造芯片，随后通过外延层将分离沟槽从层叠体的前侧蚀刻到牺牲层，该分离沟槽也限定了芯片的横向延伸。

公开(公告)号：US20100283147A1

公开(公告)日：2010-11-11

申请号：US12677068

申请日：2008-07-24

Applicant: Torsten Kramer ,  Matthias Boehringer ,  Stefan Pinter ,  Hubert Benzel ,  Matthias Illing ,  Frieder Haag ,  Simon Ambruster

Inventor： Torsten Kramer ,  Matthias Boehringer ,  Stefan Pinter ,  Hubert Benzel ,  Matthias Illing ,  Frieder Haag ,  Simon Ambruster

IPC: H01L23/498 ,  H01L21/56

CPC classification number: H01L21/78 ,  B81C1/00896 ,  B81C2201/053

Abstract: A production method for chips, in which as many method steps as possible are carried out in the wafer composite, that is, in parallel for a plurality of chips disposed on a wafer. This is a method for producing a plurality of chips whose functionality is implemented on the basis of the surface layer of a substrate. In this method, the surface layer is patterned and at least one cavity is produced below the surface layer, so that the individual chip regions are connected to each other and/or to the rest of the substrate by suspension webs only, and/or so that the individual chip regions are connected to the substrate layer below the cavity via supporting elements in the region of the cavity. The suspension webs and/or supporting elements are cut when the chips are separated. The patterned and undercut surface layer of the substrate is embedded in a plastic mass before the chips are separated.

Abstract translation: 一种芯片的制造方法，其中在晶片复合体中进行尽可能多的方法步骤，即对于设置在晶片上的多个芯片并行。 这是用于制造多个芯片的方法，其功能是基于基板的表面层来实现的。 在该方法中，对表面层进行图案化，并且在表面层下方产生至少一个空腔，使得单独的芯片区域仅通过悬挂网彼此连接和/或连接到基板的其余部分，和/或 单个芯片区域通过腔体区域中的支撑元件连接到腔体下方的衬底层。 当芯片分离时，悬挂网和/或支撑元件被切割。 在芯片分离之前，将衬底的图案和底切表面层嵌入塑料块中。

公开(公告)号：US20100267183A1

公开(公告)日：2010-10-21

申请号：US12727978

申请日：2010-03-19

Applicant: Torsten Kramer ,  Kathrin Knese ,  Hubert Benzel ,  Karl-Heinz Kraft ,  Simon Armbruster

Inventor： Torsten Kramer ,  Kathrin Knese ,  Hubert Benzel ,  Karl-Heinz Kraft ,  Simon Armbruster

IPC: H01L21/50

CPC classification number: B81C1/00333 ,  B81C2201/0192 ,  B81C2203/0118 ,  B81C2203/0127 ,  H01L2924/16235

Abstract: A simple and economical method for manufacturing very thin capped MEMS components. In the method, a large number of MEMS units are produced on a component wafer. A capping wafer is then mounted on the component wafer, so that each MEMS unit is provided with a capping structure. Finally, the MEMS units capped in this way are separated to form MEMS components. A diaphragm layer is formed in a surface of the capping wafer by using a surface micromechanical method to produce at least one cavern underneath the diaphragm layer, support points being formed that connect the diaphragm layer to the substrate underneath the cavern. The capping wafer structured in this way is mounted on the component wafer in flip chip technology, so that the MEMS units of the component wafer are capped by the diaphragm layer. The support points are then cut through in order to remove the substrate.

Abstract translation: 一种用于制造非常薄的封装的MEMS部件的简单而经济的方法。 在该方法中，在部件晶片上产生大量的MEMS单元。 然后将封盖晶片安装在元件晶片上，使得每个MEMS单元设置有封盖结构。 最后，以这种方式封盖的MEMS单元被分离以形成MEMS部件。 通过使用表面微机械方法在覆盖晶片的表面中形成隔膜层，以在隔膜层下面产生至少一个洞穴，形成将隔膜层连接到洞穴下方的基底的支撑点。 以这种方式构造的封盖晶片以倒装芯片技术安装在元件晶片上，使得元件晶片的MEMS单元被隔膜层封盖。 然后将支撑点切开以去除基底。

公开(公告)号：US08470631B2

公开(公告)日：2013-06-25

申请号：US12727978

申请日：2010-03-19

Applicant: Torsten Kramer ,  Kathrin Knese ,  Hubert Benzel ,  Karl-Heinz Kraft ,  Simon Armbruster

Inventor： Torsten Kramer ,  Kathrin Knese ,  Hubert Benzel ,  Karl-Heinz Kraft ,  Simon Armbruster

IPC: H01L21/00

CPC classification number: B81C1/00333 ,  B81C2201/0192 ,  B81C2203/0118 ,  B81C2203/0127 ,  H01L2924/16235

Abstract: A simple and economical method for manufacturing very thin capped MEMS components. In the method, a large number of MEMS units are produced on a component wafer. A capping wafer is then mounted on the component wafer, so that each MEMS unit is provided with a capping structure. Finally, the MEMS units capped in this way are separated to form MEMS components. A diaphragm layer is formed in a surface of the capping wafer by using a surface micromechanical method to produce at least one cavern underneath the diaphragm layer, support points being formed that connect the diaphragm layer to the substrate underneath the cavern. The capping wafer structured in this way is mounted on the component wafer in flip chip technology, so that the MEMS units of the component wafer are capped by the diaphragm layer. The support points are then cut through in order to remove the substrate.

Abstract translation: 一种用于制造非常薄的封装的MEMS部件的简单而经济的方法。 在该方法中，在部件晶片上产生大量的MEMS单元。 然后将封盖晶片安装在元件晶片上，使得每个MEMS单元设置有封盖结构。 最后，以这种方式封盖的MEMS单元被分离以形成MEMS部件。 通过使用表面微机械方法在覆盖晶片的表面中形成隔膜层，以在隔膜层下面产生至少一个洞穴，形成将隔膜层连接到洞穴下方的基底的支撑点。 以这种方式构造的封盖晶片以倒装芯片技术安装在元件晶片上，使得元件晶片的MEMS单元被隔膜层封盖。 然后将支撑点切开以去除基底。

公开(公告)号：US20110169107A1

公开(公告)日：2011-07-14

申请号：US13054435

申请日：2009-06-09

Applicant: Torsten Kramer ,  Stefan Pinter ,  Hubert Benzel ,  Matthias Illing ,  Frieder Haag ,  Simon Armbruster

Inventor： Torsten Kramer ,  Stefan Pinter ,  Hubert Benzel ,  Matthias Illing ,  Frieder Haag ,  Simon Armbruster

IPC: H01L29/84 ,  H01L21/62

CPC classification number: B81C99/008 ,  B81B7/0006 ,  B81B2207/093

Abstract: A process for manufacturing a component is described. In a first manufacturing step a base structure having a substrate, a diaphragm, and a cavern region is provided. The diaphragm is oriented substantially parallel to a main plane of extension of the substrate. The cavern region is situated between the substrate and the diaphragm, and has an access opening. In a second manufacturing step, a first conductive layer is provided at least partially in the cavern region, in particular on a second side of the diaphragm facing the substrate, perpendicularly to the main plane of extension.

Abstract translation: 描述了用于制造部件的工艺。 在第一制造步骤中，提供具有基底，隔膜和洞穴区域的基底结构。 隔膜取向为基本平行于基板延伸的主平面。 洞穴区域位于基板和隔膜之间，并且具有进入开口。 在第二制造步骤中，第一导电层至少部分地设置在垂直于主延伸平面的洞穴区域中，特别是在面向衬底的隔膜的第二侧上。