公开(公告)号：US08377320B2

公开(公告)日：2013-02-19

申请号：US12842334

申请日：2010-07-23

Applicant: Tzyy-Jiann Wang ,  Yueh-Hsun Tsou

Inventor： Tzyy-Jiann Wang ,  Yueh-Hsun Tsou

IPC: C03C10/00 ,  C03C25/68 ,  C23F1/00 ,  H01L21/302 ,  H01L21/461 ,  H01L21/00

CPC classification number: B81C1/00103 ,  B81B2203/0384 ,  B81C1/00571 ,  B81C2201/0136 ,  G02B6/12007 ,  G02B6/136 ,  G02B2006/1204 ,  G02B2006/12045 ,  Y10T428/24479

Abstract: A method of forming an undercut microstructure includes: forming an etch mask on a top surface of a substrate; forming, on a top surface of the etch mask, an ion implantation mask having a top surface that is smaller than the top surface of the etch mask and that does not extend beyond the top surface of the etch mask; ion implanting the substrate in the presence of the etch mask and the ion implantation mask so that a damaged region is generated at a depth below an area of the surface that is not masked by the ion implantation mask; and etching the surface of the substrate until the damaged region is removed.

Abstract translation: 形成底切微结构的方法包括：在衬底的顶表面上形成蚀刻掩模; 在所述蚀刻掩模的顶表面上形成具有比所述蚀刻掩模的顶表面小的顶表面并且不延伸超过所述蚀刻掩模的顶表面的离子注入掩模; 在蚀刻掩模和离子注入掩模的存在下离子注入衬底，使得在未被离子注入掩模掩蔽的表面的区域下方的深度处产生损伤区域; 并蚀刻衬底的表面直到损坏的区域被去除。

公开(公告)号：US07892440B1

公开(公告)日：2011-02-22

申请号：US11828639

申请日：2007-07-26

Applicant: Shekhar Bhansali ,  Abdur Rub Abdur Rahman ,  Sunny Kedia

Inventor： Shekhar Bhansali ,  Abdur Rub Abdur Rahman ,  Sunny Kedia

IPC: B44C1/22

CPC classification number: B81C1/005 ,  B81B2203/0353 ,  B81C1/00619 ,  B81C2201/0115 ,  B81C2201/0133 ,  B81C2201/0136 ,  H01L21/02052 ,  H01L21/3063

Abstract: The present invention illustrates a bulk silicon etching technique that yields straight sidewalls, through wafer structures in very short times using standard silicon wet etching techniques. The method of the present invention employs selective porous silicon formation and dissolution to create high aspect ratio structures with straight sidewalls for through wafer MEMS processing.

Abstract translation: 本发明示出了使用标准硅湿式蚀刻技术在非常短的时间内通过晶片结构产生直的侧壁的体硅蚀刻技术。 本发明的方法采用选择性多孔硅形成和溶解以产生具有用于晶片MEMS加工的直侧壁的高纵横比结构。

公开(公告)号：US07701022B2

公开(公告)日：2010-04-20

申请号：US10426015

申请日：2003-04-30

Applicant: Noriyuki Shimoji ,  Masaki Takaoka

Inventor： Noriyuki Shimoji ,  Masaki Takaoka

IPC: H01L29/84

CPC classification number: F04B43/043 ,  B81B2203/0353 ,  B81C1/00626 ,  B81C2201/0136 ,  H01L29/0657

Abstract: A semiconductor device and a method of producing the same is disclosed, in which a through hole is formed in the upper surface of a semiconductor substrate from the lower surface thereof, and an opening of a desired size is formed in a desired position on the upper surface of the substrate. A guide that functions as an etching stopper is formed in the semiconductor substrate. An opening having a width W2 is formed in the guide. The opening faces an opening in a mask used in the formation of a through hole, and the width W2 thereof is narrower than a width W4 of the opening in the mask. The direction in which etching progresses is controlled by the opening formed in the guide as etching is conducted from a lower surface of the substrate to an upper surface of the substrate, and thus deviations in the width W1 and position of an opening in the upper surface of the substrate can be controlled.

Abstract translation: 公开了一种半导体器件及其制造方法，其中从半导体衬底的下表面形成在半导体衬底的上表面中的通孔，并且在上部的所需位置形成所需尺寸的开口 基板的表面。 在半导体衬底中形成用作蚀刻阻挡层的引导件。 在导向件中形成具有宽度W2的开口。 开口面对形成通孔的掩模中的开口，其宽度W2比掩模中的开口的宽度W4窄。 蚀刻进行的方向由形成在引导件中的开口作为蚀刻控制，从基板的下表面传导到基板的上表面，因此在上表面中的宽度W1和开口的位置 可以控制基板。

公开(公告)号：US20080093694A1

公开(公告)日：2008-04-24

申请号：US12001289

申请日：2007-12-10

Applicant: Hubert Benzel ,  Heribert Weber ,  Hans Artmann ,  Thorsten Pannek ,  Frank Schafer

Inventor： Hubert Benzel ,  Heribert Weber ,  Hans Artmann ,  Thorsten Pannek ,  Frank Schafer

IPC: H01L29/02 ,  H01L21/02

CPC classification number: B81C1/00182 ,  B81B2203/0127 ,  B81B2203/0315 ,  B81C2201/0115 ,  B81C2201/0136 ,  G01L9/0042

Abstract: In a method for manufacturing a semiconductor component having a semiconductor substrate, a flat, porous diaphragm layer and a cavity underneath the porous diaphragm layer are produced to form unsupported structures for a component. In a first approach, the semiconductor substrate may receive a doping in the diaphragm region that is different from that of the cavity. This permits different pore sizes and/or porosities to be produced, which is used in producing the cavity for improved etching gas transport. Also, mesopores may be produced in the diaphragm region and nanopores may be produced as an auxiliary structure in what is to become the cavity region.

Abstract translation: 在制造具有半导体衬底的半导体部件的方法中，制造平坦的多孔隔膜层和多孔隔膜层下方的空腔，以形成用于部件的无支撑结构。 在第一种方法中，半导体衬底可以在膜片区域中接收不同于空腔的掺杂。 这允许产生不同的孔径和/或孔隙率，其用于制造用于改善蚀刻气体输送的空腔。 此外，可以在隔膜区域中产生中孔，并且可以在将要成为空腔区域的地方制造纳米孔作为辅助结构。

公开(公告)号：US07306966B2

公开(公告)日：2007-12-11

申请号：US10486182

申请日：2002-07-25

Applicant: Hubert Benzel ,  Heribert Weber ,  Hans Artmann ,  Thorsten Pannek ,  Frank Schäfer

Inventor： Hubert Benzel ,  Heribert Weber ,  Hans Artmann ,  Thorsten Pannek ,  Frank Schäfer

IPC: H01L21/00

CPC classification number: B81C1/00182 ,  B81B2203/0127 ,  B81B2203/0315 ,  B81C2201/0115 ,  B81C2201/0136 ,  G01L9/0042

Abstract: In a method for manufacturing a semiconductor component having a semiconductor substrate, a flat, porous diaphragm layer and a cavity underneath the porous diaphragm layer are produced to form unsupported structures for a component. In a first approach, the semiconductor substrate may receive a doping in the diaphragm region that is different from that of the cavity. This permits different pore sizes and/or porosities to be produced, which is used in producing the cavity for improved etching gas transport. Also, mesopores may be produced in the diaphragm region and nanopores may be produced as an auxiliary structure in what is to become the cavity region.

Abstract translation: 在制造具有半导体衬底的半导体部件的方法中，制造平坦的多孔隔膜层和多孔隔膜层下方的空腔，以形成用于部件的无支撑结构。 在第一种方法中，半导体衬底可以在膜片区域中接收不同于空腔的掺杂。 这允许产生不同的孔径和/或孔隙率，其用于制造用于改善蚀刻气体输送的空腔。 此外，可以在隔膜区域中产生介孔，并且可以在将要成为空腔区域的地方制造纳米孔作为辅助结构。

公开(公告)号：US20070019922A1

公开(公告)日：2007-01-25

申请号：US11491047

申请日：2006-07-21

Applicant: Teruo Sasagawa ,  Clarence Chui ,  Manish Kothari ,  SuryaPrakash Ganti ,  Jeffrey Sampsell

Inventor： Teruo Sasagawa ,  Clarence Chui ,  Manish Kothari ,  SuryaPrakash Ganti ,  Jeffrey Sampsell

IPC: G02B6/00

CPC classification number: G02B26/0841 ,  B81B2201/042 ,  B81B2203/0307 ,  B81C1/00595 ,  B81C2201/0136 ,  G02B6/3584 ,  G02B26/001

Abstract: A microelectromechanical systems device having support structures formed of sacrificial material that is selectively diffused with a dopant material or formed of a selectively oxidized metal sacrificial material. The microelectromechanical systems device includes a substrate having an electrode formed thereon. Another electrode is separated from the first electrode by a cavity and forms a movable layer, which is supported by support structures formed of a diffused or oxidized sacrificial material.

Abstract translation: 具有由牺牲材料形成的支撑结构的微机电系统装置，该牺牲材料选择性地用掺杂剂材料扩散或由选择性氧化的金属牺牲材料形成。 微机电系统装置包括其上形成有电极的基板。 另一电极通过空腔与第一电极分离，并形成可移动层，其由由扩散或氧化的牺牲材料形成的支撑结构支撑。

公开(公告)号：US06639289B1

公开(公告)日：2003-10-28

申请号：US09645733

申请日：2000-08-24

Applicant: Ken Maxwell Hays

Inventor： Ken Maxwell Hays

IPC: H01L2984

CPC classification number: B81C1/00595 ,  B81B2201/0242 ,  B81B2203/033 ,  B81C2201/0136 ,  B81C2201/0191 ,  B81C2203/031

Abstract: The method of the present invention provides a process for manufacturing MEMS devices having more precisely defined mechanical and/or electromechanical members. The method of the present invention begins by providing a partially sacrificial substrate and a support substrate. In order to space the mechanical and/or electromechanical members of the resulting MEMS device above the support substrate, mesas are formed on the support substrate. By forming the mesas on the support substrate instead of the partially sacrificial substrate, the mechanical and/or electromechanical members can be more precisely formed from the partially sacrificial substrate since the inner surface of the partially sacrificial substrate is not etched and therefore remains planar. As such, trenches can be precisely etched through the :planar inner surface of the partially sacrificial substrate to define mechanical and/or electromechanical members of the MEMS device. The present invention also provides an improved MEMS device, such as an improved gyroscope, that includes more precisely and reliably defined mechanical and/or electromechanical members.

Abstract translation: 本发明的方法提供了一种用于制造具有更精确定义的机械和/或机电构件的MEMS装置的方法。 本发明的方法开始于提供部分牺牲衬底和支撑衬底。 为了将所得MEMS器件的机械和/或机电部件放置在支撑基板上方，台面形成在支撑基板上。 通过在支撑衬底上形成台面而不是部分牺牲衬底，可以从部分牺牲衬底更精确地形成机械和/或机电构件，因为部分牺牲衬底的内表面没有被蚀刻并因此保持平面。 这样，可以通过部分牺牲衬底的平面内表面精确地蚀刻沟槽，以限定MEMS器件的机械和/或机电部件。 本发明还提供了一种改进的MEMS器件，例如改进的陀螺仪，其包括更准确且可靠地定义的机械和/或机电元件。

公开(公告)号：US20030127699A1

公开(公告)日：2003-07-10

申请号：US10328661

申请日：2002-12-23

Inventor： Hans Artmann ,  Thorsten Pannek

IPC: H01L021/00

CPC classification number: B81C1/0069 ,  B81B2203/0127 ,  B81B2203/0315 ,  B81C2201/0115 ,  B81C2201/0136 ,  B81C2201/0139

Abstract: In a method for producing a diaphragm sensor unit having a semiconductor material substrate, a flat diaphragm and an insulating well for thermal insulation below the diaphragm are generated, for the formation of sensor element structures for at least one sensor. The substrate, made of semiconductor material, in a specified region, which defines sensor element structures, receives a deliberately different doping from the surrounding semiconductor material, that porous semiconductor material is generated from semiconductor material sections between the regions distinguished by doping, and semiconductor material in the well region under semiconductor is rendered porous and under parts of the sensor element structure is removed and/or rendered porous.

Abstract translation: 在制造具有半导体材料基板的隔膜传感器单元的方法中，产生用于形成用于至少一个传感器的传感器元件结构的隔膜下方的平坦隔膜和隔热绝缘孔。 由限定传感器元件结构的特定区域中的由半导体材料制成的衬底接收与周围半导体材料的故意不同的掺杂，多孔半导体材料是由掺杂区域之间的半导体材料部分和半导体材料 在半导体中的阱区域被多孔化并且在传感器元件结构的部分被去除和/或变得多孔的情况下。

公开(公告)号：US06521313B1

公开(公告)日：2003-02-18

申请号：US10020353

申请日：2001-12-12

Applicant: Hans Artmann ,  Thorsten Pannek

Inventor： Hans Artmann ,  Thorsten Pannek

IPC: H01L2100

CPC classification number: B81B3/0081 ,  B81B2203/0127 ,  B81B2203/0315 ,  B81C2201/0115 ,  B81C2201/0136 ,  Y10T428/17

Abstract: In a method for producing a diaphragm sensor unit having a semiconductor material substrate, a flat diaphragm and an insulating well for thermal insulation below the diaphragm are generated, for the formation of sensor element structures for at least one sensor. The substrate, made of semiconductor material, in a specified region, which defines sensor element structures, receives a deliberately different doping from the surrounding semiconductor material, that porous semiconductor material is generated from semiconductor material sections between the regions distinguished by doping, and semiconductor material in the well region under semiconductor is rendered porous and under parts of the sensor element structure is removed and/or rendered porous.

公开(公告)号：US6361331B2

公开(公告)日：2002-03-26

申请号：US92360001

申请日：2001-08-06

Applicant: XEROX CORP

Inventor： FORK DAVID KIRTLAND ,  HO JACKSON ,  LAU RACHEL KING-HA ,  LU JENGPING

IPC: B81B3/00 ,  G01R1/067 ,  G01R1/073 ,  G01R3/00 ,  H01L23/498 ,  H01R4/48 ,  H01R12/00 ,  H01R12/57 ,  H05K3/40 ,  H01R9/09

CPC classification number: G01R1/06716 ,  B81B2203/0118 ,  B81C1/00484 ,  B81C2201/0136 ,  B81C2203/058 ,  G01R1/06727 ,  G01R1/07342 ,  G01R3/00 ,  H01L23/49811 ,  H01L2924/0002 ,  H01R4/48 ,  H01R12/57 ,  H05K3/4092 ,  Y10T29/4913 ,  Y10T29/49135 ,  Y10T29/4914 ,  H01L2924/00

Abstract: Efficient methods for lithographically fabricating spring structures onto a substrate containing contact pads or metal vias by forming both the spring metal and release material layers using a single mask. Specifically, a pad of release material is self-aligned to the spring metal finger using a photoresist mask or a plated metal pattern, or using lift-off processing techniques. A release mask is then used to release the spring metal finger while retaining a portion of the release material that secures the anchor portion of the spring metal finger to the substrate. When the release material is electrically conductive (e.g., titanium), this release material portion is positioned directly over the contact pad or metal via, and acts as a conduit to the spring metal finger in the completed spring structure. When the release material is non-conductive, a metal strap is formed to connect the spring metal finger to the contact pad or metal via, and also to further anchor the spring metal finger to the substrate.

Abstract translation: 通过使用单个掩模通过形成弹簧金属和释放材料层来将含有接触垫或金属通孔的弹性结构光刻制造到衬底上的有效方法。 具体地说，使用光致抗蚀剂掩模或电镀金属图案或使用剥离处理技术，释放材料垫与弹簧金属手指自对准。 然后使用释放掩模释放弹簧金属指，同时保持将弹簧金属指的锚固部分固定到基底的释放材料的一部分。 当释放材料是导电的（例如钛）时，该释放材料部分直接位于接触垫或金属通孔上方，并且用作在完成的弹簧结构中的弹簧金属指的导管。 当释放材料不导电时，形成金属带以将弹簧金属指连接到接触垫或金属通孔，并且还将弹簧金属指状物进一步锚定到基底。