公开(公告)号：US09472169B2

公开(公告)日：2016-10-18

申请号：US14258662

申请日：2014-04-22

Applicant: Apple Inc.

Inventor： Hao Chen ,  Benjamin K. Dodge ,  Peter F. Holland

IPC: G06T1/20 ,  G09G5/397 ,  G09G5/00 ,  G09G5/14

CPC classification number: G09G5/397 ,  G09G5/001 ,  G09G5/14 ,  G09G2340/0407 ,  G09G2340/10 ,  G09G2350/00 ,  G09G2352/00 ,  G09G2360/125

Abstract: Systems and methods for determining priorities of pixel fetch requests of separate requestors in a display control unit. The distance between the oldest pixel in an output buffer and the output equivalent coordinate of the oldest outstanding source pixel read request for each requestor in the display control unit is calculated. Then, a priority is assigned to each requestor based on this calculated distance. If a given requestor lags behind the other requestors based on a comparison of the distance between the oldest pixel and the output equivalent coordinate of the oldest outstanding source pixel read, then source pixel fetch requests for this given requestor are given a higher priority than source pixel fetch requests for the other requestors.

Abstract translation: 用于确定显示控制单元中单独请求者的像素提取请求的优先级的系统和方法。 计算输出缓冲器中的最旧像素与显示控制单元中每个请求者的最早未完成源像素读取请求的输出等效坐标之间的距离。 然后，基于该计算出的距离将优先级分配给每个请求者。 如果给定的请求者基于最旧的像素读取的最旧的源像素的输出等效坐标之间的距离的比较而落在其他请求者之后，则给予该给定请求者的源像素提取请求被给予比源像素更高的优先级 提取其他请求者的请求。

公开(公告)号：US20140317323A1

公开(公告)日：2014-10-23

申请号：US13868313

申请日：2013-04-23

Applicant: APPLE INC.

Inventor： Benjamin K. Dodge ,  Deniz Balkan ,  Gurjeet S. Saund ,  Munetoshi Fukami

IPC: G06F13/368

CPC classification number: G06F13/368 ,  G06F13/16

Abstract: A method and apparatus for arbitration. In one embodiment, a point in a network includes first and second arbiters. Arbitration of transactions associated with an address within a first range are conducted in the first arbiter, while arbitration of transactions associated with an address within a second range are conducted in the second arbiter. Each transaction is one of a number of different transaction types having a respective priority level. A measurement circuit is coupled to receive information from the first and second arbiters each cycle indicating the type of transactions that won their respective arbitrations. The measurement circuit may update a number of credits associated with the types of winning transactions. The updated number of credits may be provided to both the first and second arbiters, and may be used as a basis for arbitration in the next cycle.

Abstract translation: 一种用于仲裁的方法和装置。 在一个实施例中，网络中的一个点包括第一和第二仲裁器。 与第一范围内的地址相关联的交易的仲裁在第一仲裁器中进行，而与第二范围内的地址相关联的交易的仲裁在第二仲裁器中进行。 每个事务是具有相应优先级的多个不同事务类型之一。 耦合测量电路以从第一和第二仲裁器接收信息，每个周期指示赢得其各自仲裁的交易的类型。 测量电路可以更新与获胜交易的类型相关联的多个信用。 可以将更新的信用数量提供给第一和第二仲裁器，并且可以用作下一周期中的仲裁的基础。

公开(公告)号：US20200050379A1

公开(公告)日：2020-02-13

申请号：US16059766

申请日：2018-08-09

Applicant: Apple Inc.

Inventor： Nachiappan Chidambaram Nachiappan ,  David L. Trawick ,  Yiu Chun Tse ,  Deniz Balkan ,  Hengsheng Geng ,  Shawn Munetoshi Fukami ,  Jaideep Dastidar ,  Benjamin K. Dodge ,  Vinodh R. Cuppu

IPC: G06F3/06 ,  G06F13/16 ,  H04W72/04 ,  H04L12/853 ,  H04W28/02

Abstract: A system and method for efficiently allocating data storage to agents. A computing system includes an interconnect with intermediate buffers for storing transactions and corresponding payload data during transport between sources and destinations. A data storage limit is set on an amount of data storage corresponding to outstanding transactions for each of the multiple sources based on the initial buffer assignments. A number of outstanding transactions for each of the multiple sources is limited based on a corresponding data storage limit. If the rate of allocation of a given buffer assigned to a first source exceeds a threshold, then a second source is selected with available space exceeding a threshold in an assigned buffer. If it is determined the second source is not assigned to a buffer with a rate of allocation exceeding a threshold, then buffer storage is reassigned from the second source to the first source.

公开(公告)号：US10055809B2

公开(公告)日：2018-08-21

申请号：US15150172

申请日：2016-05-09

Applicant: Apple Inc.

Inventor： Peter F. Holland ,  Benjamin K. Dodge

IPC: G09G5/36 ,  G06T1/60 ,  G06T1/20 ,  G09G5/00 ,  G11B20/10

CPC classification number: G06T1/60 ,  G06T1/20 ,  G09G5/006 ,  G09G5/18 ,  G09G5/397 ,  G09G2330/021 ,  G09G2360/125 ,  G09G2360/18 ,  G11B20/10481 ,  H04N5/765

Abstract: Systems, apparatuses, and methods for time shifting tasks in a computing system. A system may include a display control unit configured to process pixels for display. The display control unit may include at least one or more pixel processing pipelines, a control unit, and a pixel buffer. The control unit may be configured to monitor the amount of data in the pixel buffer and set the priority of pixel fetch requests according to the amount of data in the pixel buffer. If the control unit determines that an inter frame period will occur within a given period of time, the control unit may prevent the priority of pixel fetch requests from being escalated if the amount of data in the pixel buffer falls below a threshold. The control unit may also be configured to fill the buffers of the display control unit with as much data as possible during the inter frame period.

公开(公告)号：US09189435B2

公开(公告)日：2015-11-17

申请号：US13868313

申请日：2013-04-23

Applicant: Apple Inc.

Inventor： Benjamin K. Dodge ,  Deniz Balkan ,  Gurjeet S. Saund ,  Munetoshi Fukami

IPC: G06F13/16 ,  G06F13/368

CPC classification number: G06F13/368 ,  G06F13/16

Abstract: A method and apparatus for arbitration. In one embodiment, a point in a network includes first and second arbiters. Arbitration of transactions associated with an address within a first range are conducted in the first arbiter, while arbitration of transactions associated with an address within a second range are conducted in the second arbiter. Each transaction is one of a number of different transaction types having a respective priority level. A measurement circuit is coupled to receive information from the first and second arbiters each cycle indicating the type of transactions that won their respective arbitrations. The measurement circuit may update a number of credits associated with the types of winning transactions. The updated number of credits may be provided to both the first and second arbiters, and may be used as a basis for arbitration in the next cycle.

Abstract translation: 一种用于仲裁的方法和装置。 在一个实施例中，网络中的一个点包括第一和第二仲裁器。 与第一范围内的地址相关联的交易的仲裁在第一仲裁器中进行，而与第二范围内的地址相关联的交易的仲裁在第二仲裁器中进行。 每个事务是具有相应优先级的多个不同事务类型之一。 耦合测量电路以从第一和第二仲裁器接收信息，每个周期指示赢得其各自仲裁的交易类型。 测量电路可以更新与获胜交易的类型相关联的多个信用。 可以将更新的信用数量提供给第一和第二仲裁器，并且可以用作下一周期中的仲裁的基础。

公开(公告)号：US20150302544A1

公开(公告)日：2015-10-22

申请号：US14258662

申请日：2014-04-22

Applicant: Apple Inc.

Inventor： Hao Chen ,  Benjamin K. Dodge ,  Peter F. Holland

IPC: G06T1/20

CPC classification number: G09G5/397 ,  G09G5/001 ,  G09G5/14 ,  G09G2340/0407 ,  G09G2340/10 ,  G09G2350/00 ,  G09G2352/00 ,  G09G2360/125

Abstract: Systems and methods for determining priorities of pixel fetch requests of separate requestors in a display control unit. The distance between the oldest pixel in an output buffer and the output equivalent coordinate of the oldest outstanding source pixel read request for each requestor in the display control unit is calculated. Then, a priority is assigned to each requestor based on this calculated distance. If a given requestor lags behind the other requestors based on a comparison of the distance between the oldest pixel and the output equivalent coordinate of the oldest outstanding source pixel read, then source pixel fetch requests for this given requestor are given a higher priority than source pixel fetch requests for the other requestors.

Abstract translation: 用于确定显示控制单元中单独请求者的像素提取请求的优先级的系统和方法。 计算输出缓冲器中的最旧像素与显示控制单元中每个请求者的最早未完成源像素读取请求的输出等效坐标之间的距离。 然后，基于该计算出的距离将优先级分配给每个请求者。 如果给定的请求者基于最旧的像素读取的最旧的源像素的输出等效坐标之间的距离的比较而落在其他请求者之后，则给予该给定请求者的源像素提取请求被给予比源像素更高的优先级 提取其他请求者的请求。

公开(公告)号：US20140181419A1

公开(公告)日：2014-06-26

申请号：US13724955

申请日：2012-12-21

Applicant: APPLE INC.

Inventor： Gurjeet S. Saund ,  Harshavardhan Kaushikkar ,  Benjamin K. Dodge

IPC: G06F12/08

CPC classification number: G06F13/385 ,  G06F13/28 ,  H04L47/10

Abstract: Systems and methods for preventing excessive buffering of transactions in a coherence point. The coherence point uses a lookahead mechanism to determine if there are enough credits from the memory controller for forwarding the outstanding transactions stored in the IRQ. If there are not enough credits, then the coherence point prevents the switch fabric from forwarding additional transactions to the coherence point. By preventing excessive buffering in the IRQ, the QoS-based ordering of transactions performed by the switch fabric is preserved.

Abstract translation: 在一致性点防止交易过度缓冲的系统和方法。 相干点使用前瞻机制来确定存储器控制器中是否有足够的信用来转发存储在IRQ中的未完成事务。 如果没有足够的积分，则相干点可以防止交换结构将附加事务转发到相干点。 通过防止IRQ中的过度缓冲，交换结构执行的事务的基于QoS的排序得以保留。