公开(公告)号：US11189710B2

公开(公告)日：2021-11-30

申请号：US16874889

申请日：2020-05-15

Applicant: Applied Materials, Inc.

Inventor： Byeong Chan Lee ,  Tejinder Singh ,  Bencherki Mebarki

IPC: H01L29/66 ,  H01L21/762 ,  H01L21/285 ,  H01L21/02 ,  H01L21/3105 ,  H01L29/423 ,  H01L21/3213 ,  H01L21/308 ,  H01L21/033 ,  H01L29/786

Abstract: Method of forming an electronic device with a bottom isolation dielectric between a pair of gate stacks is described. Each of the gate stacks comprises a plurality of gate layers. A sacrificial film having a liner on a top and side thereof is on top of the gate layers. A capping layer is on the top of the liner.

公开(公告)号：US11145509B2

公开(公告)日：2021-10-12

申请号：US16853500

申请日：2020-04-20

Applicant: Applied Materials, Inc.

Inventor： Takehito Koshizawa ,  Rui Cheng ,  Tejinder Singh ,  Hidetaka Oshio

IPC: H01L21/033 ,  H01L21/311 ,  H01L21/3213 ,  H01L21/768

Abstract: In an embodiment, a method for forming features for semiconductor processing. A first mandrel and a second mandrel are formed on a substrate. A first spacer is formed along a first sidewall of the first mandrel, and a second spacer is formed along a second sidewall of the second mandrel. A gap is defined between the first spacer and the second spacer. The gap is filled by a gap-filling material. In some examples, the gap-filling material includes a doped silicon material. In some examples, the first spacer and the second spacer each include a doped silicon material.

公开(公告)号：US20200373411A1

公开(公告)日：2020-11-26

申请号：US16874889

申请日：2020-05-15

Applicant: Applied Materials, Inc.

Inventor： Byeong Chan Lee ,  Tejinder Singh ,  Bencherki Mebarki

IPC: H01L29/66 ,  H01L21/762 ,  H01L21/285 ,  H01L21/3213 ,  H01L21/3105 ,  H01L29/423 ,  H01L21/02

Abstract: Method of forming an electronic device with a bottom isolation dielectric between a pair of gate stacks is described. Each of the gate stacks comprises a plurality of gate layers. A sacrificial film having a liner on a top and side thereof is on top of the gate layers. A capping layer is on the top of the liner.

公开(公告)号：US20200043932A1

公开(公告)日：2020-02-06

申请号：US16527915

申请日：2019-07-31

Applicant: Applied Materials, Inc.

Inventor： Tejinder Singh ,  Takehito Koshizawa ,  Abhijit Basu Mallick ,  Pramit Manna ,  Nancy Fung ,  Eswaranand Venkatasubramanian ,  Ho-yung David Hwang ,  Samuel E. Gottheim

IPC: H01L27/108

Abstract: Apparatuses and methods to provide a patterned substrate are described. A plurality of patterned and spaced first lines and carbon material lines and formed on the substrate surface by selectively depositing and etching films extending in a first direction and films extending in a second direction that crosses the first direction to pattern the underlying structures.