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公开(公告)号:US11164616B2
公开(公告)日:2021-11-02
申请号:US16506641
申请日:2019-07-09
Applicant: Arm Limited
Inventor: Piyush Jain , Surya Prakash Gupta , El Mehdi Boujamaa , Cyrille Nicolas Dray , Akshay Kumar
Abstract: Various implementations described herein are directed to device having a memory block and a sense amplifier coupled to the memory block. The device may include a bias generator that applies a bias signal to the sense amplifier for regulating read current to the sense amplifier for faster activation of the memory block.
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公开(公告)号:US11056164B2
公开(公告)日:2021-07-06
申请号:US16268427
申请日:2019-02-05
Applicant: Arm Limited
Inventor: Akshay Kumar , El Mehdi Boujamaa , Cyrille Nicolas Dray
IPC: G11C11/16
Abstract: Briefly, embodiments of claimed subject matter relate to circuits and methods for providing signals, such as signals to bring about writing of binary logic values to magnetic random-access memory (MRAM) cells. In particular embodiments, such circuits may operate to control output signal variability over an operating temperature range.
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公开(公告)号:US20210005237A1
公开(公告)日:2021-01-07
申请号:US16504072
申请日:2019-07-05
Applicant: Arm Limited
Inventor: Surya Prakash Gupta , El Mehdi Boujamaa , Cyrille Nicolas Dray , Piyush Jain , Akshay Kumar
IPC: G11C11/16
Abstract: Various implementations described herein are directed to device having a clock generator that provides write reference signals. The device may include a voltage divider that receives the write reference signals and provides an output reference signal based on write polarity of the write reference signals. The device may include a voltage regulator that receives the output reference signal and provides a regulated voltage to a load based on the output reference signal.
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公开(公告)号:US20200251156A1
公开(公告)日:2020-08-06
申请号:US16268427
申请日:2019-02-05
Applicant: Arm Limited
Inventor: Akshay Kumar , El Mehdi Boujamaa , Cyrille Nicolas Dray
IPC: G11C11/16
Abstract: Briefly, embodiments of claimed subject matter relate to circuits and methods for providing signals, such as signals to bring about writing of binary logic values to magnetic random-access memory (MRAM) cells. In particular embodiments, such circuits may operate to control output signal variability over an operating temperature range.
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公开(公告)号:US10181350B2
公开(公告)日:2019-01-15
申请号:US15842207
申请日:2017-12-14
Applicant: ARM Limited
Inventor: Shidhartha Das , Andreas Hansson , Akshay Kumar , Piyush Agarwal , Azeez Jennudin Bhavnagarwala , Lucian Shifren
Abstract: A method of writing a state to a correlated electron element in a storage circuit, comprising receiving a write command to write the state into the correlated electron element; reading a stored state of the correlated electron element; comparing the state and the stored state; and enabling a write driver to write the state into the correlated electron element when the state and read state are different.
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公开(公告)号:US11081177B2
公开(公告)日:2021-08-03
申请号:US16466149
申请日:2017-11-10
Applicant: Arm Limited
Inventor: Akshay Kumar
IPC: G11C13/00
Abstract: Broadly speaking, embodiments of the present techniques provide apparatus and methods for generating a reference current for a memory array sensing scheme, and for using the generated reference current to sense the state of memory cells within the memory array. The generated reference current is particularly suitable for distinguishing between a high resistance state and a low resistance state.
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公开(公告)号:US10937494B2
公开(公告)日:2021-03-02
申请号:US16277988
申请日:2019-02-15
Applicant: Arm Limited
Inventor: El Mehdi Boujamaa , Akshay Kumar
Abstract: Briefly, the disclosure relates to circuits utilized to perform writing operations to a memory array, in which elements of the array comprise resistive memory cells coupled in series with an access device. In one embodiment, a circuit may comprise a supply voltage coupled to a first side of the array and a current source coupled to a second side of the array. The access devices of the elements of the array may be body-biased, which may operate to reduce the turn-on voltage (VTH) of the access devices. Particular voltages may be applied to gate regions of the access devices to control leakage current to the resistive memory cells of the array.
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公开(公告)号:US20210012823A1
公开(公告)日:2021-01-14
申请号:US16506641
申请日:2019-07-09
Applicant: Arm Limited
Inventor: Piyush Jain , Surya Prakash Gupta , El Mehdi Boujamaa , Cyrille Nicolas Dray , Akshay Kumar
IPC: G11C11/16
Abstract: Various implementations described herein are directed to device having a memory block and a sense amplifier coupled to the memory block. The device may include a bias generator that applies a bias signal to the sense amplifier for regulating read current to the sense amplifier for faster activation of the memory block.
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公开(公告)号:US20200265891A1
公开(公告)日:2020-08-20
申请号:US16277988
申请日:2019-02-15
Applicant: Arm Limited
Inventor: El Mehdi Boujamaa , Akshay Kumar
Abstract: Briefly, the disclosure relates to circuits utilized to perform writing operations to a memory array, in which elements of the array comprise resistive memory cells coupled in series with an access device. In one embodiment, a circuit may comprise a supply voltage coupled to a first side of the array and a current source coupled to a second side of the array. The access devices of the elements of the array may be body-biased, which may operate to reduce the turn-on voltage (VTH) of the access devices. Particular voltages may be applied to gate regions of the access devices to control leakage current to the resistive memory cells of the array.
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公开(公告)号:US10270416B2
公开(公告)日:2019-04-23
申请号:US15410922
申请日:2017-01-20
Applicant: ARM Limited
Inventor: Bal S. Sandhu , Mudit Bhargava , Akshay Kumar , Piyush Agarwal , Shidhartha Das
Abstract: Many kinds of filters are found in electronic circuits and provide a range of signal processing applications. Such filters can be passive, active, analog or digital and work across a range of frequencies. Present techniques provide an electronic filter circuit comprising resistive and capacitive elements, wherein a resistive element of the filter circuit is provided by a correlated electron material device.
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