Circuits to control output signal variability

    公开(公告)号:US11056164B2

    公开(公告)日:2021-07-06

    申请号:US16268427

    申请日:2019-02-05

    Applicant: Arm Limited

    Abstract: Briefly, embodiments of claimed subject matter relate to circuits and methods for providing signals, such as signals to bring about writing of binary logic values to magnetic random-access memory (MRAM) cells. In particular embodiments, such circuits may operate to control output signal variability over an operating temperature range.

    Voltage Regulation Circuitry
    13.
    发明申请

    公开(公告)号:US20210005237A1

    公开(公告)日:2021-01-07

    申请号:US16504072

    申请日:2019-07-05

    Applicant: Arm Limited

    Abstract: Various implementations described herein are directed to device having a clock generator that provides write reference signals. The device may include a voltage divider that receives the write reference signals and provides an output reference signal based on write polarity of the write reference signals. The device may include a voltage regulator that receives the output reference signal and provides a regulated voltage to a load based on the output reference signal.

    Circuits to Control Output Signal Variability

    公开(公告)号:US20200251156A1

    公开(公告)日:2020-08-06

    申请号:US16268427

    申请日:2019-02-05

    Applicant: Arm Limited

    Abstract: Briefly, embodiments of claimed subject matter relate to circuits and methods for providing signals, such as signals to bring about writing of binary logic values to magnetic random-access memory (MRAM) cells. In particular embodiments, such circuits may operate to control output signal variability over an operating temperature range.

    Generating a reference current for sensing

    公开(公告)号:US11081177B2

    公开(公告)日:2021-08-03

    申请号:US16466149

    申请日:2017-11-10

    Applicant: Arm Limited

    Inventor: Akshay Kumar

    Abstract: Broadly speaking, embodiments of the present techniques provide apparatus and methods for generating a reference current for a memory array sensing scheme, and for using the generated reference current to sense the state of memory cells within the memory array. The generated reference current is particularly suitable for distinguishing between a high resistance state and a low resistance state.

    Increasing current to memory devices while controlling leakage current

    公开(公告)号:US10937494B2

    公开(公告)日:2021-03-02

    申请号:US16277988

    申请日:2019-02-15

    Applicant: Arm Limited

    Abstract: Briefly, the disclosure relates to circuits utilized to perform writing operations to a memory array, in which elements of the array comprise resistive memory cells coupled in series with an access device. In one embodiment, a circuit may comprise a supply voltage coupled to a first side of the array and a current source coupled to a second side of the array. The access devices of the elements of the array may be body-biased, which may operate to reduce the turn-on voltage (VTH) of the access devices. Particular voltages may be applied to gate regions of the access devices to control leakage current to the resistive memory cells of the array.

    Increasing Current to Memory Devices While Controlling Leakage Current

    公开(公告)号:US20200265891A1

    公开(公告)日:2020-08-20

    申请号:US16277988

    申请日:2019-02-15

    Applicant: Arm Limited

    Abstract: Briefly, the disclosure relates to circuits utilized to perform writing operations to a memory array, in which elements of the array comprise resistive memory cells coupled in series with an access device. In one embodiment, a circuit may comprise a supply voltage coupled to a first side of the array and a current source coupled to a second side of the array. The access devices of the elements of the array may be body-biased, which may operate to reduce the turn-on voltage (VTH) of the access devices. Particular voltages may be applied to gate regions of the access devices to control leakage current to the resistive memory cells of the array.

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