RENDERING METHOD AND PROCESSOR
    11.
    发明申请

    公开(公告)号:US20210125395A1

    公开(公告)日:2021-04-29

    申请号:US16665924

    申请日:2019-10-28

    Abstract: A method comprising the steps of generating a first representation and a second representation, where the first representation represents a first view of a computer-generated scene obtained from a first virtual camera and the second representation represents a second view of the computer-generated scene obtained from a second virtual camera. Each of the first and second representation comprises a plurality of rays which intersect with objects of the scene. A relationship is determined between a ray of the first representation and a ray of the second representation; which are grouped based on the relationship, to form a group of substantially similar rays. One or more of the groups of substantially similar rays are processed substantially simultaneously to produce a first a second rendered view of the computer-generated scene. The first the second rendered view are output to one or more display devices.

    COMPUTE OPTIMIZATION
    12.
    发明申请

    公开(公告)号:US20210064688A1

    公开(公告)日:2021-03-04

    申请号:US16552548

    申请日:2019-08-27

    Abstract: A computer implemented method for performing convolutions between subsets of an input data array and a kernel resulting in subsets of an output data array. The method may include receiving an input data array and using positional data indicating the position of elements of the input data array to determine subsets of the input data array which contains at least one non-zero value data element; performing convolutions between the subsets of the input data array containing at least one non-zero value data element and a kernel to produce output data array subsets; and combining the output data subsets with the positional data to generate output data indicative of a completed output data array.

    TOPOLOGICAL MODEL GENERATION
    13.
    发明申请

    公开(公告)号:US20210055409A1

    公开(公告)日:2021-02-25

    申请号:US16547266

    申请日:2019-08-21

    Abstract: A method comprising: obtaining pose data representative of a pose of a portable device during observation of an environment comprising an object; obtaining distance data representative of a distance between the object and a receiver during the observation of the environment, using at least one radio waveform reflected from the object and received by the receiver; and processing the pose data and the distance data to generate a topological model of the object.

    METHODS, APPARATUS AND PROCESSOR FOR PRODUCING A HIGHER RESOLUTION FRAME

    公开(公告)号:US20200082505A1

    公开(公告)日:2020-03-12

    申请号:US16519657

    申请日:2019-07-23

    Abstract: A method of producing a full resolution frame, comprising generating a tile representation of the frame. The tile representation comprises a plurality of tiles each associated with an area of the frame. The method also includes eliminating one or more predetermined portions of each tile and rendering retained portions of each tile to produce rendered tiles. The method also transforms the rendered tiles into processed tiles. The full resolution frame is then constructed from the processed tiles.

    PROCESSING IMAGE DATA USING DIFFERENT DATA REDUCTION RATES

    公开(公告)号:US20200034993A1

    公开(公告)日:2020-01-30

    申请号:US16044070

    申请日:2018-07-24

    Abstract: Examples of the present disclosure relate to methods for processing image data. In one such example, first data representing a rendered image is received. In some cases, second data useable to identify at least one target region of the rendered image is received, the at least one target region being associated with a gaze direction of a viewer. A first portion of the first data is processed in accordance with a first data reduction rate to derive first processed data, the first portion representing the at least one target region. A second portion of the first data is processed in accordance with a second data reduction rate, different from the first data reduction rate. The second portion represents a further region of the rendered image, different from the at least one target image. At least the first processed data is outputted.

    IMAGE PROCESSING
    16.
    发明申请
    IMAGE PROCESSING 审中-公开

    公开(公告)号:US20200034615A1

    公开(公告)日:2020-01-30

    申请号:US16507430

    申请日:2019-07-10

    Abstract: A local object classifier using a set of object definitions to perform object classification in image frames. The local object classifier is arranged to detect an object in an image frame and determine whether to transmit image data for the detected object to a remote object classifier. In response to said determining, the local object classifier is arranged to transmit image data, derived from the image data representative of the image frame, to the remote object classifier. The local object classifier is also arranged to receive object data, representative of the detected object, from the remote object classifier.

    TRANSFERRING DATA BETWEEN MEMORY SYSTEM AND BUFFER OF A MASTER DEVICE

    公开(公告)号:US20170364461A1

    公开(公告)日:2017-12-21

    申请号:US15612072

    申请日:2017-06-02

    Applicant: ARM LIMITED

    Abstract: A master device has a buffer for storing data transferred from, or to be transferred to, a memory system. Control circuitry issues from time to time a group of one or more transactions to request transfer of a block of data between the memory system and the buffer. Hardware or software mechanism can be provided to detect at least one memory load parameter indicating how heavily loaded the memory system is, and a group size of the block of data transferred per group can be varied based on the memory load parameter. By adapting the size of the block of data transferred per group based on memory system load, a better balance between energy efficiency and quality of service can be achieved.

    METHOD OF AND APPARATUS FOR GENERATING AN OUTPUT FRAME
    18.
    发明申请
    METHOD OF AND APPARATUS FOR GENERATING AN OUTPUT FRAME 审中-公开
    用于产生输出框架的方法和装置

    公开(公告)号:US20160021384A1

    公开(公告)日:2016-01-21

    申请号:US14793907

    申请日:2015-07-08

    Applicant: ARM LIMITED

    Abstract: A method and an apparatus are provided for generating an output frame from an input frame, in which the input frame is processed when generating the output frame. A region of a current input frame is compared with a region of a preceding input frame to determine if the region of the current input frame is similar to the region of the preceding input frame. When the region of the current input frame is determined to be similar to the region of the preceding input frame, information relating to processing performed on the region of the preceding input frame when generating a region of a preceding output frame is read, wherein the information is generated during the processing on the region of the preceding input frame. When the information indicates that the processing is unnecessary, a part or all of the processing of the region of the current input frame can be bypassed or eliminated.

    Abstract translation: 提供了一种从输入帧生成输出帧的方法和装置,其中在生成输出帧时处理输入帧。 将当前输入帧的区域与前一输入帧的区域进行比较,以确定当前输入帧的区域是否类似于前一输入帧的区域。 当当前输入帧的区域被确定为类似于前一输入帧的区域时,读取与产生前一输出帧的区域的前一输入帧的区域相关的处理相关的信息,其中信息 在前一输入帧的区域的处理期间生成。 当信息指示不需要处理时,可以绕过或消除当前输入帧的区域的一部分或全部处理。

    ADDRESS TRANSLATION IN A DATA PROCESSING APPARATUS
    19.
    发明申请
    ADDRESS TRANSLATION IN A DATA PROCESSING APPARATUS 有权
    数据处理设备中的地址翻译

    公开(公告)号:US20150178220A1

    公开(公告)日:2015-06-25

    申请号:US14579483

    申请日:2014-12-22

    Applicant: ARM Limited

    CPC classification number: G06F12/1027 G06F2212/304 Y02D10/13

    Abstract: Address translation circuitry and a method of operating such a translation circuitry are provided. The address translation circuitry is configured to receive a first address used in a first addressing system and to translate it into a second address used in a second addressing system. Translation pipeline circuitry has plural pipeline stages configured to translate the first address into the second address over the course of the plural pipeline stages. Address comparison circuitry is configured to identify an address match condition when a received first address at least partially matches a previously received first address. Insertion circuitry is configured to determine a stage of progress of the previously received first address in the plural pipeline stages and to cause content of the stage of progress of the previously received first address to be unchanged at a next pipeline cycle when the address comparison circuitry identifies the address match condition.

    Abstract translation: 提供地址转换电路和操作这种翻译电路的方法。 地址转换电路被配置为接收在第一寻址系统中使用的第一地址并将其转换成在第二寻址系统中使用的第二地址。 翻译流水线电路具有多个流水线级,配置成在多个流水线阶段的过程中将第一地址转换为第二地址。 地址比较电路被配置为当接收到的第一地址至少部分匹配先前接收到的第一地址时,识别地址匹配条件。 插入电路被配置为确定多个流水线级中先前接收到的第一地址的进展阶段,并且当地址比较电路识别时,使下一个流水线周期使先前接收的第一地址的进展阶段的内容不变 地址匹配条件。

    DATA PROCESSING
    20.
    发明申请

    公开(公告)号:US20220222569A1

    公开(公告)日:2022-07-14

    申请号:US17145804

    申请日:2021-01-11

    Applicant: Arm Limited

    Abstract: A processing unit is provided which comprises volatile storage for storing machine learning data in binary representation, and a data processing engine communicatively coupled to the volatile storage. The processing unit is configured to selectively invert the bit values in binary representations of portions of the machine learning data when performing storage operations using the volatile storage. A computer-implemented method, and non-transitory computer-readable storage medium comprising instructions for executing the method are also provided. The method comprises receiving a request to perform a storage operation on the volatile storage using the machine learning data and performing the storage operation, including, selecting a portion of the machine learning data and inverting bit values in a binary representation of the selected portion. A computer-implemented method comprising receiving a request to store machine learning data on volatile storage and storing the machine learning data is also provided. Storing the machine learning data includes operating on at least a portion of the machine learning data to prioritize one of two potential bit values.

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