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11.
公开(公告)号:US20230015690A1
公开(公告)日:2023-01-19
申请号:US17812488
申请日:2022-07-14
Applicant: ASM IP Holding, B.V.
Inventor: Maart van Druenen , Qi Xie , Charles Dezelah , Petro Deminskyi , Lifu Chen , Giuseppe Alessio Verni , Ren-Jie Chang
Abstract: Disclosed are methods and systems for depositing layers comprising a transition metal and a group 13 element. The layers are formed onto a surface of a substrate. The deposition process may be a cyclical deposition process. Exemplary structures in which the layers may be incorporated include field effect transistors, VNAND cells, metal-insulator-metal (MIM) structures, and DRAM capacitors.
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公开(公告)号:US20250062128A1
公开(公告)日:2025-02-20
申请号:US18922849
申请日:2024-10-22
Applicant: ASM IP Holding B.V.
Inventor: Maart van Druenen , Charles Dezelah , Qi Xie , Petro Deminskyi , Giuseppe Alessio Verni , Ren-Jie Chang , Lifu Chen
Abstract: Methods and systems for depositing rare earth metal carbide containing layers on a surface of a substrate and structures and devices formed using the methods are disclosed. An exemplary method includes using a cyclical deposition process such as an atomic layer deposition process for depositing a rare earth metal carbide containing layer onto a surface of the substrate.
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公开(公告)号:US20240093363A1
公开(公告)日:2024-03-21
申请号:US18522778
申请日:2023-11-29
Applicant: ASM IP Holding B.V.
Inventor: Charles Dezelah , Eric James Shero , Qi Xie , Giuseppe Alessio Verni , Petro Deminskyi
IPC: C23C16/455 , C23C16/52
CPC classification number: C23C16/45534 , C23C16/45553 , C23C16/52
Abstract: The current disclosure relates to the manufacture of semiconductor devices, specifically to methods of forming vanadium metal on a substrate. The methods comprise providing a substrate in a reaction chamber, providing a vanadium precursor to the reaction chamber in a vapor phase and providing a reducing agent to the reaction chamber in a vapor phase to form vanadium metal on the substrate. The disclosure further relates to structures and devices formed by the methods, as well as to a deposition assembly.
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公开(公告)号:US20220285147A1
公开(公告)日:2022-09-08
申请号:US17685525
申请日:2022-03-03
Applicant: ASM IP Holding B.V.
Inventor: Lifu Chen , Qi Xie , Charles Dezelah , Petro Deminskyi , Giuseppe Alessio Verni , Petri Raisanen , Eric James Shero
IPC: H01L21/02 , C23C16/455 , C23C16/52 , C23C16/08
Abstract: Disclosed are methods and systems for depositing layers comprising a titanium, aluminum, and carbon. The layers are formed onto a surface of a substrate. The deposition process comprises a cyclical deposition process. Exemplary structures in which the layers may be incorporated include field effect transistors, VNAND cells, metal-insulator-metal (MIM) structures, and DRAM capacitors.
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公开(公告)号:US20220165575A1
公开(公告)日:2022-05-26
申请号:US17529562
申请日:2021-11-18
Applicant: ASM IP Holding B.V.
Inventor: Qi Xie , Giuseppe Alessio Verni , Tatiana Ivanova , Perttu Sippola , Michael Eugene Givens , Eric Shero , Jiyeon Kim , Charles Dezelah , Petro Deminskyi , Ren-Jie Chang
IPC: H01L21/28 , H01L21/02 , C23C16/52 , C23C16/455
Abstract: Methods and systems for depositing threshold voltage shifting layers onto a surface of a substrate and structures and devices formed using the methods are disclosed. An exemplary method includes using a cyclical deposition process, depositing a threshold voltage shifting layer onto a surface of the substrate.
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公开(公告)号:US20210335612A1
公开(公告)日:2021-10-28
申请号:US17235985
申请日:2021-04-21
Applicant: ASM IP Holding B.V
Inventor: Petro Deminskyi , Charles Dezelah , Jiyeon Kim , Giuseppe Alessio Verni , Maart Van Druenen , Qi Xie , Petri Räisänen
IPC: H01L21/28 , H01L29/49 , C23C16/38 , C23C16/455 , C23C16/50
Abstract: Methods and systems for depositing a layer, comprising one or more of vanadium boride and vanadium phosphide, onto a surface of a substrate and structures and devices formed using the methods are disclosed. An exemplary method includes using a deposition process. The deposition process can include providing a vanadium precursor to the reaction chamber and separately providing a reactant to the reaction chamber. Exemplary structures can include field effect transistor structures, such as gate all around structures. The layer comprising one or more of vanadium boride and vanadium phosphide can be used, for example, as barrier layers or liners, as work function layers, as dipole shifter layers, or the like.
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