公开(公告)号：US20170243559A1

公开(公告)日：2017-08-24

申请号：US15437589

申请日：2017-02-21

Applicant: AU Optronics Corporation

Inventor： Peng-Bo XI ,  Sung-Yu SU

IPC: G09G5/00 ,  H03K17/693

CPC classification number: G09G5/003 ,  G09G3/006 ,  G09G3/20 ,  G09G3/3614 ,  G09G2300/0408 ,  G09G2300/0452 ,  G09G2310/0235 ,  G09G2310/0254 ,  G09G2310/0291 ,  G09G2310/0297 ,  G09G2310/061 ,  H03K17/002 ,  H03K17/693

Abstract: A multiplexer is provided herein. The multiplexer has a plurality of first driving units and a plurality of second driving units. Each of the first driving units has a first data voltage input terminal, and each of the second driving units has a second data voltage input terminal. The first data voltage input terminal and the second data voltage input terminal are configured to receive pixel voltage signals with different polarities. In the first driving unit, a voltage difference between a gate and a drain of a transistor is controlled by a first reset signal, wherein the transistor of the first driving unit is coupled to the first data voltage input terminal and a first data line. In the second driving unit, a voltage difference between a gate and a drain of a transistor is controlled by a second reset signal, wherein the transistor of the second driving unit is coupled to the second data voltage input terminal and a second data line.

公开(公告)号：US20220391034A1

公开(公告)日：2022-12-08

申请号：US17511610

申请日：2021-10-27

Applicant: AU Optronics Corporation

Inventor： Shu-Hao HUANG ,  Sung-Yu SU

IPC: G06F3/041 ,  G06F3/044 ,  G09G3/20

Abstract: A driving circuit includes a driving transistor, a capacitor, a reset circuit, a touch sensing electrode, a sensing circuit, and a read circuit. The capacitor is electrically coupled to a gate terminal of the driving transistor. The reset circuit is electrically coupled to the gate terminal of the driving transistor, and the reset circuit is configured to reset the voltage level of the gate terminal of the driving transistor. The sensing circuit is electrically coupled between the touch sensing electrode and the gate terminal of the driving transistor, and the sensing circuit is configured to transmit the voltage level of the touch sensing electrode to the gate terminal of the driving transistor. The read circuit is electrically coupled to the driving transistor, and the read circuit is configured to output a touch sensing signal according to the voltage level of the gate terminal of the driving transistor.

公开(公告)号：US20210201741A1

公开(公告)日：2021-07-01

申请号：US17201138

申请日：2021-03-15

Applicant: AU Optronics Corporation

Inventor： Rong-Fu LIN ,  Chi YU ,  Chih-Fu YANG ,  Jie-Chuan HUANG ,  Sung-Yu SU

IPC: G09G3/20

Abstract: A multiplexer circuit includes a first switch unit and a second switch unit. The first switch unit is electrically connected to a first data line and a first pixel circuit, and configured to turn on according to a first signal in a first time duration. The second switch unit is electrically connected to the first data line and a second pixel circuit, and configured to turn on according to a second signal in a second time duration. The first time duration and the second time duration substantially start or end at a same time, so that the first time duration and the second time duration have overlap.

公开(公告)号：US20200126506A1

公开(公告)日：2020-04-23

申请号：US16723346

申请日：2019-12-20

Applicant: AU Optronics Corporation

Inventor： Peng-Bo XI ,  Sung-Yu SU

IPC: G09G5/00 ,  H03K17/693 ,  G09G3/36 ,  G09G3/20 ,  G09G3/00

Abstract: A multiplexer is provided herein. The multiplexer has a plurality of first driving units and a plurality of second driving units. Each of the first driving units has a first data voltage input terminal, and each of the second driving units has a second data voltage input terminal. The first data voltage input terminal and the second data voltage input terminal are configured to receive pixel voltage signals with different polarities. In the first driving unit, a voltage difference between a gate and a drain of a transistor is controlled by a first reset signal, wherein the transistor of the first driving unit is coupled to the first data voltage input terminal and a first data line. In the second driving unit, a voltage difference between a gate and a drain of a transistor is controlled by a second reset signal, wherein the transistor of the second driving unit is coupled to the second data voltage input terminal and a second data line.

公开(公告)号：US20190073985A1

公开(公告)日：2019-03-07

申请号：US15925951

申请日：2018-03-20

Applicant: AU OPTRONICS CORPORATION

Inventor： Peng-Bo XI ,  Sung-Yu SU

IPC: G09G5/10

Abstract: A display device includes a plurality of sub pixels, a first data line, and a second data line. The first data line is configured to provide a first pixel voltage to a first sub pixel of the sub pixels, and the first sub pixel has a first color. The second data line is configured to provide a second pixel voltage to a second sub pixel of the sub pixels, and the second sub pixel has the first color. The first data line and the second data line are disposed between two adjacent sub pixels of the sub pixels. Polarities of the first pixel voltage and the second pixel voltage are different.

公开(公告)号：US20180284542A1

公开(公告)日：2018-10-04

申请号：US15802017

申请日：2017-11-02

Applicant: AU OPTRONICS CORPORATION

Inventor： Peng-Bo XI ,  Sung-Yu SU ,  Chu-Hsuan I

IPC: G02F1/1337 ,  G02F1/1362 ,  G02F1/1368 ,  H01L27/12

CPC classification number: G02F1/133707 ,  G02F1/136227 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/133357 ,  G02F2001/136295 ,  H01L27/1244 ,  H01L27/1259

Abstract: A method for manufacturing a pixel unit includes the following steps. A channel layer is formed. A first pattern layer is formed above the channel layer and includes a scan line and a gate electrode. A second pattern layer is formed above the first pattern layer and includes a data line and a source electrode, where the source electrode is electrically connected to the channel layer. A third pattern layer is formed above the second pattern layer and includes a drain electrode and an auxiliary electrode, where the drain electrode is electrically connected to the channel layer. The auxiliary electrode is electrically connected to the scan line through a first contact hole.

公开(公告)号：US20220336425A1

公开(公告)日：2022-10-20

申请号：US17723856

申请日：2022-04-19

Applicant: AU OPTRONICS CORPORATION

Inventor： June-Woo LEE ,  Yang-En WU ,  Sung-Yu SU ,  Hsien-Chun WANG ,  Ya-Jung WANG ,  Chia-Ting HSIEH ,  Chien-Fu HUANG ,  Hsin-Ying LIN

IPC: H01L25/075 ,  H01L33/38 ,  H01L33/62

Abstract: The present disclosure provides a light emitting diode component, including a body and a plurality of P-N diode structures. The P-N diode structures are coupled in series and integrated on the body. The P-N diode structures include a plurality of p-type doping layers and a plurality of n-type doping layers. The p-type doping layer of a first P-N diode structure in the P-N diode structures is electrically coupled to the n-type doping layer of a second P-N diode structure in the P-N diode structures.

公开(公告)号：US20180366076A1

公开(公告)日：2018-12-20

申请号：US15828912

申请日：2017-12-01

Applicant: AU OPTRONICS CORPORATION

Inventor： Yu-Min CHI ,  Sung-Yu SU

IPC: G09G3/36 ,  G02F1/1343 ,  G02F1/1362

Abstract: An array substrate includes three first conductive lines, three second conductive lines, and four switches. The three first conductive lines are sequentially and consecutively arranged along a direction, and the three second conductive lines are sequentially and consecutively arranged along another direction and intersect the first conductive lines. The four switches are respectively connected to the corresponding first conductive lines and the corresponding second conductive lines. Two of the switches are connected to the second one of the first conductive lines and are substantially located between two adjacent second conductive lines, and the other two of the switches are not connected to the second one of the first conductive lines and are substantially located between the other two adjacent second conductive lines.

公开(公告)号：US20180336809A1

公开(公告)日：2018-11-22

申请号：US15981034

申请日：2018-05-16

Applicant: AU OPTRONICS CORPORATION

Inventor： Peng-Bo XI ,  Sung-Yu SU

IPC: G09G3/00 ,  G09G3/20

Abstract: A display panel includes: a display region, a plurality of data lines, a de-multiplexing circuit, and an operation switching circuit. The de-multiplexing circuit has a plurality of input terminals coupled to a plurality of data driving signal lines, a plurality of output terminals coupled to the plurality of data lines, and at least one de-multiplexing control terminal coupled to at least one driving control signal. The operation switching circuit is configured to switch a conduction status between the at least one de-multiplexing control terminal of the de-multiplexing circuit and a second control signal line according to a voltage of a first control signal line.

公开(公告)号：US20180174540A1

公开(公告)日：2018-06-21

申请号：US15836218

申请日：2017-12-08

Applicant: AU OPTRONICS CORPORATION

Inventor： Peng-Bo XI ,  Sung-Yu SU ,  Chen-Feng FAN

IPC: G09G3/36 ,  G02F1/139

CPC classification number: G09G3/3674 ,  G02F1/139 ,  G02F1/1396 ,  G02F2001/134381 ,  G09G3/3614 ,  G09G3/3655 ,  G09G3/3677 ,  G09G2300/0426

Abstract: A control circuit includes a switching circuit and a select circuit. The switching circuit is configured to receive a scan signal, a first switching signal, and a second switching signal, and output the first switching signal and the second switching signal according to the scan signal. The select circuit is configured to receive a first supply voltage, a second supply voltage, the first switching signal, and the second switching signal, and selectively output the first supply voltage or the second supply voltage to a target electrode according to the first switching signal and the second switching signal.