公开(公告)号：US20140191935A1

公开(公告)日：2014-07-10

申请号：US14237677

申请日：2012-08-03

申请人： Hideki Morii ,  Akihisa Iwamoto ,  Satoshi Horiuchi ,  Takayuki Mizunaga ,  Kazuya Nakaminami

发明人： Hideki Morii ,  Akihisa Iwamoto ,  Satoshi Horiuchi ,  Takayuki Mizunaga ,  Kazuya Nakaminami

IPC分类号： G09G3/36

CPC分类号： G09G3/3611 ,  G09G3/3677 ,  G09G2330/027

摘要： The invention provides a liquid crystal display device that includes an IGZO-GDM which can quickly remove a residual charge in a panel when the power supply is turned off, and a driving method of the liquid crystal display device. Each bistable circuit that configures a shift register includes a thin film transistor TI for increasing a potential of an output terminal based on a first clock, a region netA connected to a gate terminal of the thin film transistor TI, a thin film transistor TC for lowering a potential of the region netA, and a region netB connected to a gate terminal of the thin film transistor TC. In such a configuration, a power supply off sequence includes a display off sequence and a gate off sequence. The gate off sequence includes at least a gate-bus-line discharge step (t14 to t15), a netB discharge step (t15 to t16), and a netA discharge step (t16 to t17).

摘要翻译： 本发明提供了一种液晶显示装置，其包括IGART-GDM，其可以在电源关闭时快速去除面板中的残留电荷，以及液晶显示装置的驱动方法。 配置移位寄存器的每个双稳态电路包括用于基于第一时钟增加输出端子的电位的薄膜晶体管TI，连接到薄膜晶体管TI的栅极端子的区域netA，用于降低的薄膜晶体管TC 区域netA的电位和连接到薄膜晶体管TC的栅极端子的区域netB。 在这种配置中，电源断开序列包括显示关闭序列和关闭序列。 栅极截止序列至少包括栅极总线放电步骤（t14至t15），netB放电步骤（t15至t16）和netA放电步骤（t16至t17）。

公开(公告)号：US20120223926A1

公开(公告)日：2012-09-06

申请号：US13504964

申请日：2010-07-07

申请人： Hideki Morii ,  Akihisa Iwamoto ,  Takayuki Mizunaga ,  Kei Ikuta

发明人： Hideki Morii ,  Akihisa Iwamoto ,  Takayuki Mizunaga ,  Kei Ikuta

IPC分类号： G09G5/00 ,  G05F1/46

CPC分类号： H02M3/155 ,  G09G3/3696 ,  H02M3/07 ,  H02M2001/009

摘要： An object is to provide at low cost a Power-supply circuit that can generate positive and negative analog power source voltages of which absolute values of voltage values are equal.A Power-supply circuit (210) is configured by a DCDC converter circuit (212) and a charge pump circuit (214). The charge pump circuit (214) includes a diode (D3) that passes a current when a control switch (51) is in an off state, and a diode (D4) that passes a current when the control switch (51) is in an on state. A DCDC converter circuit (212) includes two diodes (D1, D2) that pass a current when the control switch (S1) is in an off state. A rectifying unit that includes the diodes (D1, D2) is configured such that a forward drop voltage of the rectifying unit becomes equal to a sum of a forward drop voltage of the diode (D3) and a forward drop voltage of the diode (D4).

摘要翻译： 目的是提供一种能够产生电压值绝对值相等的正和负模拟电源电压的电源电路。 电源电路（210）由DCDC转换器电路（212）和电荷泵电路（214）构成。 电荷泵电路（214）包括：二极管（D3），当控制开关（51）处于断开状态时，使二极管（D3）通过电流;以及二极管（D4），当控制开关（51）为 在状态。 DCDC转换器电路（212）包括当控制开关（S1）处于断开状态时通过电流的两个二极管（D1，D2）。 包括二极管（D1，D2）的整流单元被配置为使得整流单元的正向压降电压等于二极管（D3）的正向压降电压和二极管（D4）的正向压降电压之和 ）。

公开(公告)号：US20120218245A1

公开(公告)日：2012-08-30

申请号：US13501151

申请日：2010-08-27

申请人： Hideki Morii ,  Akihisa Iwamoto ,  Takayuki Mizunaga ,  Yuuki Ohta

发明人： Hideki Morii ,  Akihisa Iwamoto ,  Takayuki Mizunaga ,  Yuuki Ohta

IPC分类号： G09G5/00 ,  G09G3/36

CPC分类号： G09G3/3677 ,  G09G2330/027

摘要： A liquid crystal display device includes a monolithic gate driver capable of quickly eliminating residual charges within pixel formation portions when the power-supply is turned off. Each of bistable circuits that constitute a shift register within a gate driver is provided with a thin-film transistor having a drain terminal connected to a gate bus line, a source terminal connected to a reference potential line for transmitting a reference potential, and a gate terminal to which a clock signal for operating the shift register is supplied. When the external supply of power-supply voltage is cut off, the clock signal is set to high level to turn the thin-film transistor to the ON state, and the level of the reference potential is increased from a gate-OFF potential to a gate-ON potential.

摘要翻译： 液晶显示装置包括能够在电源关闭时快速消除像素形成部分内的残余电荷的单片栅极驱动器。 在栅极驱动器内构成移位寄存器的双稳态电路中的每一个具有薄膜晶体管，该薄膜晶体管具有连接到栅极总线的漏极端子，连接到用于传输参考电位的基准电位线的源极端子和栅极 提供用于操作移位寄存器的时钟信号的端子。 当电源电压的外部电源被切断时，时钟信号被设置为高电平，以将薄膜晶体管转换到导通状态，并且参考电位的电平从栅极截止电位增加到 栅极导通电位。

公开(公告)号：US08248337B2

公开(公告)日：2012-08-21

申请号：US11921402

申请日：2006-05-19

申请人： Masakazu Takeuchi ,  Akihisa Iwamoto ,  Hideki Morii ,  Takayuki Mizunaga

发明人： Masakazu Takeuchi ,  Akihisa Iwamoto ,  Hideki Morii ,  Takayuki Mizunaga

IPC分类号： G09G3/36

CPC分类号： H04N5/202 ,  H04N9/646 ,  H04N9/69

摘要： In one embodiment of the present invention, a video signal processing method is disclosed wherein video correction data is read from a ROM and written into an LUT, and the video correction data written in the LUT is used to perform data correction of an externally inputted video signal. The video correction data written in the LUT is updated during the horizontal blanking interval of the video signal.

摘要翻译： 在本发明的一个实施例中，公开了一种视频信号处理方法，其中从ROM中读取视频校正数据并将其写入LUT，并且使用写入LUT的视频校正数据来执行外部输入视频的数据校正 信号。 写入LUT中的视频校正数据在视频信号的水平消隐间隔期间被更新。

公开(公告)号：US20110001752A1

公开(公告)日：2011-01-06

申请号：US12736077

申请日：2008-12-04

申请人： Yuuki Ohta ,  Hideki Morii ,  Akihisa Iwamoto ,  Takayuki Mizunaga ,  Masahiro Hirokane

发明人： Yuuki Ohta ,  Hideki Morii ,  Akihisa Iwamoto ,  Takayuki Mizunaga ,  Masahiro Hirokane

IPC分类号： G06T1/60

CPC分类号： G11C19/28 ,  G09G3/2096 ,  G09G3/3666 ,  G09G3/3677 ,  G09G2300/0417 ,  G09G2310/0286 ,  G09G2310/0289

摘要： A display panel drive circuit including a shift register including unit circuits connected in cascade, each of the unit circuits outputting a signal line selection signal, is so configured that: each of the unit circuits receives a clock signal nd either a signal line selection signal outputted from another-stage unit circuit or a start pulse signal, and the clock signal has a returned portion following an activation portion thereof, the returned portion including a first region that is sloped and a second region that is sloped more steeply than the first region. With the configuration, it is possible to realize a display panel drive circuit and a display panel driving method each of which (i) restrains an occurrence of a poor gate-on pulse signal, (ii) improves a pixel charging rate, and (iii) allows a clock signal to have higher frequency.

摘要翻译： 一种显示面板驱动电路，包括：移位寄存器，包括串联连接的单元电路，每个输出信号线选择信号的单元电路被配置为：每个单元电路接收时钟信号nd或输出的信号线选择信号 来自另一级单元电路或起始脉冲信号，并且时钟信号具有在其激活部分之后的返回部分，返回部分包括倾斜的第一区域和比第一区域更陡峭的第二区域。 通过该结构，可以实现显示面板驱动电路和显示面板驱动方法，其中，（i）抑制差的栅极导通脉冲信号的发生，（ii）提高像素充电速率，（iii ）允许时钟信号具有更高的频率。

公开(公告)号：US20090046112A1

公开(公告)日：2009-02-19

申请号：US12087793

申请日：2006-11-06

申请人： Kazuma Hirao ,  Akihisa Iwamoto ,  Hideki Morii

发明人： Kazuma Hirao ,  Akihisa Iwamoto ,  Hideki Morii

IPC分类号： G06F3/038

CPC分类号： G09G3/2011 ,  G09G3/20 ,  G09G3/3614 ,  G09G3/3648 ,  G09G2320/0673

摘要： In one embodiment of the present invention, a liquid crystal panel driving device for AC-driving a liquid crystal panel with first and second polarities includes an output tone generating section for generating an output tone corresponding to an input tone. With respect to the same input tone, the output tone generating section generates a first output tone when driving the liquid crystal panel with a first polarity, and generates a second output tone when driving the liquid crystal panel with a second polarity. The first and second output tones are determined based on a characteristic of the input tone and the center of amplitude of a voltage to be outputted in response to the input tone in AC driving. This allows providing a liquid crystal panel driving device capable of easily performing Ω correction with respect to each liquid crystal panel.

摘要翻译： 在本发明的一个实施例中，用于以第一和第二极性AC驱动液晶面板的液晶面板驱动装置包括用于产生与输入色调相对应的输出色调的输出色调产生部分。 对于相同的输入音，当以第一极性驱动液晶面板时，输出音产生部分产生第一输出音，并且在以第二极性驱动液晶面板时产生第二输出音。 响应于AC驱动中的输入音调，基于输入音调的特性和要输出的电压的振幅中心来确定第一和第二输出音调。 这允许提供能够容易地对每个液晶面板执行欧米茄校正的液晶面板驱动装置。

公开(公告)号：US09293094B2

公开(公告)日：2016-03-22

申请号：US14237677

申请日：2012-08-03

申请人： Hideki Morii ,  Akihisa Iwamoto ,  Satoshi Horiuchi ,  Takayuki Mizunaga ,  Kazuya Nakaminami

发明人： Hideki Morii ,  Akihisa Iwamoto ,  Satoshi Horiuchi ,  Takayuki Mizunaga ,  Kazuya Nakaminami

IPC分类号： G09G3/36

CPC分类号： G09G3/3611 ,  G09G3/3677 ,  G09G2330/027

摘要： The invention provides a liquid crystal display device that includes an IGZO-GDM which can quickly remove a residual charge in a panel when the power supply is turned off, and a driving method of the liquid crystal display device. Each bistable circuit that configures a shift register includes a thin film transistor TI for increasing a potential of an output terminal based on a first clock, a region netA connected to a gate terminal of the thin film transistor TI, a thin film transistor TC for lowering a potential of the region netA, and a region netB connected to a gate terminal of the thin film transistor TC. In such a configuration, a power supply off sequence includes a display off sequence and a gate off sequence. The gate off sequence includes at least a gate-bus-line discharge step (t14 to t15), a netB discharge step (t15 to t16), and a netA discharge step (t16 to t17).

摘要翻译： 本发明提供了一种液晶显示装置，其包括IGART-GDM，其可以在电源关闭时快速去除面板中的残留电荷，以及液晶显示装置的驱动方法。 配置移位寄存器的每个双稳态电路包括用于基于第一时钟增加输出端子的电位的薄膜晶体管TI，连接到薄膜晶体管TI的栅极端子的区域netA，用于降低的薄膜晶体管TC 区域netA的电位和连接到薄膜晶体管TC的栅极端子的区域netB。 在这种配置中，电源断开序列包括显示关闭序列和关闭序列。 栅极截止序列至少包括栅极总线放电步骤（t14至t15），netB放电步骤（t15至t16）和netA放电步骤（t16至t17）。

公开(公告)号：US08952880B2

公开(公告)日：2015-02-10

申请号：US12736121

申请日：2008-12-17

申请人： Takayuki Mizunaga ,  Hideki Morii ,  Akihisa Iwamoto ,  Masahiro Hirokane ,  Yuuki Ohta

发明人： Takayuki Mizunaga ,  Hideki Morii ,  Akihisa Iwamoto ,  Masahiro Hirokane ,  Yuuki Ohta

IPC分类号： G09G3/36 ,  G11C19/00 ,  G11C19/18 ,  G11C19/28

CPC分类号： G09G3/3677 ,  G09G2310/0286 ,  G09G2330/025 ,  G11C19/184 ,  G11C19/28

摘要： A display panel drive circuit includes a shift register constructed of unit circuits connected in stages. The unit circuits generate signal line selection signals, respectively, which signal line selection signals are made active for a respective certain period of time to form a respective pulse, and the pulses are outputted successively from respective unit circuits in order of ordinal number starting from a first stage until an end stage. In at least one embodiment, each of the unit circuits receive (i) clock signals generated based on a sync signal received from outside of the display panel drive circuit, (ii) a start pulse signal generated based on the sync signal, or a signal line selection signal generated in a stage different from its own stage, and (iii) a clear signal. The clear signal is made active in a case where anomalousness is included in the sync signal, and no pulse is outputted from the shift register until a subsequent vertical scanning period starts. This configuration achieves a display panel drive circuit which prevents display disorder or holds down increase in load given to a power source, each of which occurs in a case where anomalousness is included in the sync signal.

摘要翻译： 显示面板驱动电路包括由分阶段连接的单元电路构成的移位寄存器。 单位电路分别产生信号线选择信号，这些信号线选择信号在相应的特定时间段内被激活以形成相应的脉冲，并且从相应的单位电路依次从 第一阶段直到结束阶段。 在至少一个实施例中，每个单元电路接收（i）基于从显示面板驱动电路的外部接收的同步信号产生的时钟信号，（ii）基于同步信号产生的起始脉冲信号或信号 在与其自身的阶段不同的阶段中产生的线选择信号，以及（iii）清除信号。 在同步信号中包含异常的情况下，清除信号被激活，并且在随后的垂直扫描期间开始之前没有脉冲从移位寄存器输出。 这种配置实现了一种显示面板驱动电路，其防止显示无序或者抑制给予电源的负载增加，每个电源在同步信号中包括异常的情况下发生。

公开(公告)号：US08519764B2

公开(公告)日：2013-08-27

申请号：US13501198

申请日：2010-07-15

申请人： Akihisa Iwamoto ,  Hideki Morii ,  Takayuki Mizunaga ,  Kei Ikuta

发明人： Akihisa Iwamoto ,  Hideki Morii ,  Takayuki Mizunaga ,  Kei Ikuta

IPC分类号： H03K3/00

CPC分类号： G11C19/28 ,  G09G3/3685 ,  G09G2310/0275 ,  G09G2310/0286 ,  G11C19/287

摘要： Each stage that constitutes a shift register includes an output-control thin-film transistor for increasing a potential of a scanning signal based on a first clock (CKA), two thin-film transistors for increasing a potential of a first node connected to a gate terminal of the output-control thin-film transistor, based on a scanning signal outputted from a pre-stage/a latter stage, and two thin-film transistors for decreasing a potential of the first node, based on a scanning signal outputted from a third stage after/a third stage before a stage concerned. The shift register operates based on four-phase clock signals, including two-phase clock signals that are provided to odd-order stages and two-phase clock signals that are provided to even-order stages, of which phases are shifted by 90 degrees from each other.

摘要翻译： 构成移位寄存器的各级包括用于增加基于第一时钟（CKA）的扫描信号的电位的输出控制薄膜晶体管，用于增加连接到栅极的第一节点的电位的两个薄膜晶体管 基于从前级/后级输出的扫描信号的输出控制薄膜晶体管的端子和用于降低第一节点的电位的两个薄膜晶体管，基于从 在有关阶段之后的第三阶段。 移位寄存器基于四相时钟信号进行操作，包括提供给奇数级的两相时钟信号和提供给偶数级的两相时钟信号，其中相位偏移90度 彼此。

公开(公告)号：US20120120044A1

公开(公告)日：2012-05-17

申请号：US13380375

申请日：2010-01-27

申请人： Takayuki Mizunaga ,  Hideki Morii ,  Akihisa Iwamoto ,  Yuuki Ohta ,  Kei Ikuta

发明人： Takayuki Mizunaga ,  Hideki Morii ,  Akihisa Iwamoto ,  Yuuki Ohta ,  Kei Ikuta

IPC分类号： G09G5/00

CPC分类号： G09G3/3614 ,  G09G3/3655 ,  G09G2310/0205 ,  G09G2310/0251 ,  G09G2310/0283 ,  G09G2310/067 ,  G09G2320/0247 ,  G09G2320/046

摘要： Provided is a liquid crystal display device performing a precharge and having a function of switching an order for selecting scanning lines, in which such as flicker and burn-in can be prevented from being produced. A scanning line drive circuit selects scanning lines either in ascending order or in descending order based on an order of arrangement according to a shift direction signal, and causes selection periods of the scanning lines to be partially overlapped for a precharge. A data line drive circuit applies voltages of different polarities to data lines by frame and by data line. A common voltage generating circuit generates two types of voltages whose levels are independently adjustable, selects one of the two voltages according to a scan selection signal and applies the selected voltage to a common electrode of a liquid crystal panel. As the common voltage generating circuit, a D/A converter may be used.

摘要翻译： 提供一种执行预充电并具有切换用于选择扫描线的顺序的功能的液晶显示装置，其中可以防止诸如闪烁和老化的产生。 扫描线驱动电路基于根据移位方向信号的布置顺序以升序或降序选择扫描线，并且使扫描线的选择周期部分地重叠用于预充电。 数据线驱动电路按数据线和数据线对数据线施加不同极性的电压。 公共电压产生电路产生电平独立可调的两种电压，根据扫描选择信号选择两个电压中的一个，并将所选择的电压施加到液晶面板的公共电极。 作为公共电压发生电路，可以使用D / A转换器。