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公开(公告)号：US4628280A
公开(公告)日：1986-12-09
申请号：US764142
申请日：1985-08-09
CPC分类号： H03F3/45183 , H03F1/0261 , H03F2203/45364 , H03F2203/45466 , H03F2203/45674
摘要： An amplifier that supplies a bias current (I.sub.t) which is dependent on an input signal (V.sub.i) to a junction point (2) of the source electrodes of first and second transistors (T.sub.1, T.sub.2). The amplifier comprises a control circuit that limits the bias current so it cannot increase more than is necessary to obtain a high slew rate, thereby minimizing dissipation by the amplifier. This control circuit comprises a third and a fourth transistor (T.sub.3, T.sub.4) arranged in parallel with the first transistor (T.sub.1) and the second transistor (T.sub.2), respectively, and which carry currents (I.sub.3, I.sub.4) which are proportional to the currents (I.sub.1, I.sub.2) in the first and the second transistor. A selection circuit (5) applies the smaller of the two currents (I.sub.3, I.sub.4) in the third and the fourth transistor to an output (8) where this current is compared with a reference current (I.sub.o) from a current source (9). The difference between these currents is applied to a current amplifier ( 10), which supplies an increasing bias current (I.sub.t) until the smaller of the two currents (I.sub.3, I.sub.4) in the third and the fourth transistor equals the reference current.
摘要翻译： 向第一和第二晶体管（T1，T2）的源电极的接合点（2）提供取决于输入信号（Vi）的偏置电流（It）的放大器。 放大器包括限制偏置电流的控制电路，因此不能增加获得高压摆率所必需的电流，从而使放大器的耗散最小化。 该控制电路包括分别与第一晶体管（T1）和第二晶体管（T2）并联布置的第三和第四晶体管（T3，T4），并且它们与电流成比例的载流电流（I3，I4） （I1，I2）在第一和第二晶体管中。 选择电路（5）将第三和第四晶体管中的两个电流（I3，I4）中的较小的一个电路与来自电流源（9）的参考电流（Io）进行比较的输出（8） 。 这些电流之间的差异被施加到电流放大器（10），其提供增加的偏置电流（It），直到第三和第四晶体管中的两个电流（I3，I4）中的较小的一个等于参考电流。
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公开(公告)号：US4612513A
公开(公告)日：1986-09-16
申请号：US707288
申请日：1985-03-01
申请人： Evert Seevinck
发明人： Evert Seevinck
IPC分类号： H03F3/45
CPC分类号： H03F3/45085 , H03F2203/45392 , H03F2203/45454 , H03F2203/45604
摘要： A first and a second transistor (T.sub.1, T.sub.2) whose emitters are connected to a common point (4) via first resistors (R.sub.1, R.sub.2), which common point is connected to the positive power-supply terminal via a current source (I.sub.1), form a differential amplifier to which an input signal (V.sub.i) is applied. In order to increase the slew rate the quiescent current through the first and the second transistor (T.sub.1, T.sub.2) is made to increase when the input voltage (V.sub.i) increases. This is achieved by means of a third transistor (T.sub.3) whose emitter is connected to the common point (4). The base of this transistor (T.sub.3) is connected to the tapping of a voltage divider which is arranged between the bases of the first and the second transistor (T.sub.1, T.sub.2) and which comprises second resistors (R.sub.3, R.sub.4). When the input voltage increases the transistor (T.sub.3) drains a continually decreasing portion of the current from the current source (I.sub.1).
摘要翻译： 第一和第二晶体管（T1，T2），其发射体经由第一电阻器（R1，R2）连接到公共点（4），该公共点经由电流源（I1）连接到正电源端子， 形成施加输入信号（Vi）的差分放大器。 为了提高转换速率，当输入电压（Vi）增加时，通过第一和第二晶体管（T1，T2）的静态电流增加。 这通过其发射极连接到公共点（4）的第三晶体管（T3）来实现。 该晶体管（T3）的基极连接到布置在第一和第二晶体管（T1，T2）的基极之间并且包括第二电阻器（R3，R4）的分压器的抽头。 当输入电压增加时，晶体管（T3）从电流源（I1）排出电流的不断减少的部分。
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公开(公告)号：US4599578A
公开(公告)日：1986-07-08
申请号：US622045
申请日：1984-06-19
申请人： Evert Seevinck
发明人： Evert Seevinck
CPC分类号： H03F1/52
摘要： To protect a transistor its emitter current is converted by a resistor into a voltage which by means of a voltage-current converter is converted into a current which is proportional to the emitter current. The collector-emitter voltage is converted by means of a voltage-current converter into a current which is proportional to the difference between a knee voltage which is applied to the converter, and the collector-emitter voltage, the converter not producing an output current for collector-emitter voltages exceeding the knee voltage. The difference between the output currents of the converters is compared with the current carried by a current source. The protection circuit becomes operative when this difference current exceeds the current carried by the current source. A control amplifier then drives the transistor in such manner that the difference current becomes equal to the current. Above the knee voltage a residual current which has a value proportional to the current carried by the current source continues to flow through the transistor T.sub.1. As a result thereof the value of the residual current depends to a lesser extent on variations, which reduces the risk of damage to the transistor due to overloading at high collector-emitter voltages.
摘要翻译： 为了保护晶体管，其发射极电流由电阻器转换为电压，通过电压 - 电流转换器转换成与发射极电流成比例的电流。 集电极 - 发射极电压通过电压 - 电流转换器转换成与施加到转换器的拐点电压和集电极 - 发射极电压之间的差成比例的电流，转换器不产生输出电流 集电极 - 发射极电压超过拐点电压。 将转换器的输出电流之差与电流源所承载的电流进行比较。 当该差电流超过电流源承载的电流时，保护电路就可以工作。 然后，控制放大器以这样的方式驱动晶体管，使得差电流变得等于电流。 在拐点电压之上，具有与电流源承载的电流成比例的值的剩余电流继续流过晶体管T1。 作为其结果，剩余电流的值在较小程度上取决于变化，这降低了由于在高集电极 - 发射极电压下的过载而对晶体管的损坏的风险。
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公开(公告)号：US20050270833A1
公开(公告)日：2005-12-08
申请号：US10503459
申请日：2003-01-20
IPC分类号： G11C17/18 , G11C7/06 , G11C11/409 , G11C11/419 , G11C16/28 , G11C11/34
CPC分类号： G11C7/062 , G11C11/419
摘要： A reading circuit comprises a first and second cascode circuit and a first and second current mirror. The first cascode circuit can connected to a bit line of a memory cell and the second cascode circuit can be connected to a reference bit line of a reference cell. The first output terminals of the first and second cascode circuits are connected to first terminals of the first and second current mirrors, respectively. The second output terminals of the first and second cascode circuits are connected to the second terminals of the second and first current mirrors, respectively. A tri-state buffer is coupled between the second terminals of the first and second current mirrors said buffer having bit invert capabilities.
摘要翻译： 读取电路包括第一和第二共源共栅电路以及第一和第二电流镜。 第一级联电路可以连接到存储器单元的位线，并且第二共源共栅电路可以连接到参考单元的参考位线。 第一和第二共源共栅电路的第一输出端分别连接到第一和第二电流镜的第一端。 第一和第二共源共栅电路的第二输出端分别连接到第二和第一电流镜的第二端。 三态缓冲器耦合在第一和第二电流镜的第二端之间，所述缓冲器具有位反转能力。
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公开(公告)号：US06346855B1
公开(公告)日：2002-02-12
申请号：US09550608
申请日：2000-04-14
申请人： Evert Seevinck
发明人： Evert Seevinck
IPC分类号： H03F345
CPC分类号： H03F3/45085 , H03F2200/63 , H03F2203/45288
摘要： In transconductance amplifier arrangements used in CATV systems, it is often desirable to set the value of the output impedance to a value equal to the system impedance that is often 75&OHgr;. prior art transconductance amplifiers often comprise an amplifier (6) with a current output using a feedback network (8) to set the gain value. An input of the feedback network (8) is coupled to the current output of the amplifier (6) and an output of the feedback network (8) is coupled to the input of the amplifier (6). In these prior art transconductance amplifier arrangements the output impedance decreases with increasing gain of the amplifier (6) used in the amplifier arrangement. This output impedance is normally very low (a few &OHgr; or lower). By adding a further output current (i/N) to the output of the feedback network, it is obtained that the current through the feedback network (8) becomes dependent on the output current (i) of the amplifier. This dependence results in an increased output impedance.
摘要翻译： 在CATV系统中使用的跨导放大器布置中，通常希望将输出阻抗的值设置为等于通常为75OMEGA的系统阻抗的值。 现有技术的跨导放大器通常包括具有电流输出的放大器（6），其使用反馈网络（8）来设置增益值。 反馈网络（8）的输入耦合到放大器（6）的电流输出端，并且反馈网络（8）的输出耦合到放大器（6）的输入端。 在这些现有技术的跨导放大器装置中，输出阻抗随着在放大器装置中使用的放大器（6）的增益的增加而减小。 该输出阻抗通常非常低（几个OMEGA或更低）。 通过向反馈网络的输出添加另外的输出电流（i / N），可以获得通过反馈网络（8）的电流取决于放大器的输出电流（i）。 这种依赖性导致输出阻抗增加。
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公开(公告)号：US6028480A
公开(公告)日：2000-02-22
申请号：US859801
申请日：1997-05-19
申请人： Evert Seevinck , Monuko Du Plessis
发明人： Evert Seevinck , Monuko Du Plessis
CPC分类号： H03F1/0261 , H03F3/45076 , H03F2203/45201
摘要： In a differential pair (P1, P2) actively loaded with a current mirror (N1, N2), a differential amplifier (A) drives the common terminal (Z) of the current mirror to force a zero voltage difference between the input terminal (X) and the output terminal (Y) of the current mirror. The voltage at the input terminal (X) is actively bootstrapped, via the differential amplifier (A), by the voltage of the output terminal (Y) with high precision. Thus a high voltage gain is obtained. A capacitor (CP) between the input terminal (X) and the control terminal (Z) compensates the local loop formed by the differential amplifier (A) and the input transistor (N1) of the current mirror, and forms a short circuit at high frequencies, thus reducing the active load of the differential pair to a conventional current mirror. For high frequencies the circuit has the same gain and phase properties as the standard non-bootstrapped approach and standard compensating techniques can be applied to the complete amplifier.
摘要翻译： 在主动负载电流镜（N1，N2）的差分对（P1，P2）中，差分放大器（A）驱动电流镜的公共端（Z），以迫使输入端（X ）和电流镜的输出端子（Y）。 输入端子（X）的电压通过差分放大器（A）以高精度主动自适应输出端子（Y）的电压。 从而获得高电压增益。 输入端子（X）和控制端子（Z）之间的电容器（CP）补偿由差动放大器（A）和电流镜的输入晶体管（N1）形成的本地环路，并在高电平处形成短路 频率，从而将差分对的有效负载降低到传统的电流镜。 对于高频，电路具有与标准非自举方法相同的增益和相位特性，标准补偿技术可以应用于完整的放大器。
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17.发明授权Apparatus for measuring the quiescent current of an integrated monolithic digital circuit 失效用于测量集成的单片数字电路的电流的装置
公开(公告)号：US5057774A
公开(公告)日：1991-10-15
申请号：US462663
申请日：1990-01-09
CPC分类号： G01R31/3004 , G01R19/15
摘要： An arrangement for measuring the quiescent current of a digital IC includes a current sensor connected in series with the IC and the voltage supply, a voltage stabilization circuit for stabilizing the voltage across the IC and a signal processing circuit coupled thereto for processing the measured quiescent current. The quiescent current is measured when no flip-flops are switched in the IC. By means of the arrangement, it is possible to measure rapidly and accurately whether the quiescent current assumes an abnormal value, which indicates that the IC contains defects. The signal processing circuit may include a current mirror which is coupled to a current comparator circuit supplying a digital output signal for determining the existence of a defect.
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公开(公告)号：US4951003A
公开(公告)日：1990-08-21
申请号：US352421
申请日：1989-05-16
申请人： Willem De Jager , Evert Seevinck
发明人： Willem De Jager , Evert Seevinck
CPC分类号： H03F3/45089 , H03F1/3211
摘要： A amplifier circuit comprises first transistor (T.sub.1) and a second transistor (T.sub.2) whose emitters are each connected via a first resistors (R.sub.1) to a point (2) which is connected to the power-supply terminal (3) by means of a current source (1). The bases of said transistors are connected to input terminals (4,5) and via a second resistor (R.sub.2) each to the base of a third transistor (T.sub.3) whose emitter is connected to the terminal (2). The linearity of the circuit is improved by arranging a fourth transistor (T.sub.4) and a fifth transistor (T.sub.5) in series with the collector-emitter paths of the first transistor (T.sub.1) and the second transistor (T.sub.2) which fourth and fifth transistor have their bases connected to a reference terminal (7) and have their emitters interconnected by means of a third resistor (R.sub.3).
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公开(公告)号：US4584535A
公开(公告)日：1986-04-22
申请号：US622349
申请日：1984-06-19
申请人： Evert Seevinck
发明人： Evert Seevinck
CPC分类号： G05F3/227
摘要： In a current source circuit, a first and a second PNP transistor have commoned base electrodes, their emitters being connected through resistors to the positive supply voltage terminal. The collector lead of the first transistor includes a current source, which supplies a current which is reproduced at the output terminal. The commoned base electrodes are driven by a third transistor connected as an emitter follower, its emitter lead including a current source. The base of the third transistor is connected through a resistor to the positive supply voltage terminal as a result of which supply voltage variations appear also at the commoned bases of the first and second transistors so that the output current at the output terminal is substantially independent of supply voltage variations. A differential amplifier comprising fourth and fifth transistors, in which the base of the fourth transistor is connected to the collector of the first transistor and the base of the fifth transistor is connected to a reference voltage, controls the voltage at the base of the third transistor so that the collector current of the first transistor is substantially equal to the current of the current source.
摘要翻译： 在电流源电路中，第一和第二PNP晶体管具有共用的基极，其发射极通过电阻器连接到正电源电压端子。 第一晶体管的集电极引线包括电流源，其提供在输出端再现的电流。 普通基极由作为射极跟随器连接的第三晶体管驱动，其发射极引线包括电流源。 第三晶体管的基极通过电阻器连接到正电源电压端子，由此在第一和第二晶体管的共用基极处也出现电源电压变化，使得输出端子处的输出电流基本上独立于 电源电压变化。 一种包括第四和第五晶体管的差分放大器，其中第四晶体管的基极连接到第一晶体管的集电极，第五晶体管的基极连接到参考电压，控制第三晶体管的基极处的电压 使得第一晶体管的集电极电流基本上等于电流源的电流。
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公开(公告)号：US07439759B2
公开(公告)日：2008-10-21
申请号：US10558145
申请日：2004-05-17
IPC分类号： H03K17/16 , H03K19/003
CPC分类号： G06F13/4072
摘要： As technology scales, on-chip interconnects are becoming narrower, and the height of such interconnects is not scaling linearly with the width. This leads to an increase of coupling capacitance with neighboring wires, leading to higher crosstalk. It also leads to poor performance due to poor RC response at the receiving of the wire, which may even result in failure in very noisy environments. An adaptive threshold scheme is proposed in which receiver switching thresholds are adjusted according to the detected noise in bus lines. These noise levels are dependent on both the front-end processing (transistor performance) as well as on the backend processing (metal resistance, capacitance, width and spacing). The circuit therefore automatically compensates for process variations.
摘要翻译： 随着技术的发展，片上互连变得越来越窄，这种互连的高度并没有随宽度而线性缩放。 这导致与相邻导线的耦合电容的增加，导致更高的串扰。 由于在接收线路时RC响应差，导致性能差，甚至可能导致非常嘈杂的环境中的故障。 提出了一种自适应阈值方案，其中接收机切换阈值根据总线线路中检测到的噪声进行调整。 这些噪声水平取决于前端处理（晶体管性能）以及后端处理（金属电阻，电容，宽度和间距）。 因此，电路自动补偿过程变化。
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