公开(公告)号：US20210384870A1

公开(公告)日：2021-12-09

申请号：US16946090

申请日：2020-06-05

Applicant: Analog Devices, Inc.

Inventor： Arthur J. Kalb ,  Yoshinori Kusuda

IPC: H03F1/52 ,  H02H3/20 ,  H02M1/32

Abstract: Apparatus and methods for amplifier input-overvoltage protection with low leakage current are provided herein. In certain embodiments, amplifier input circuitry for an amplifier includes a pair of input terminals, a pair of input transistors each having a control input (for instance, a transistor gate), a pair of protection transistors each connected between one of the input terminals and the control input of a corresponding one of the input transistors, and a bidirectional clamp connected between the control inputs of the input transistors. Implementing the amplifier input circuitry in this manner provides a number of advantages including, but not limited to, robust protection against input overvoltage and low input-leakage current.

公开(公告)号：US11139789B1

公开(公告)日：2021-10-05

申请号：US16946095

申请日：2020-06-05

Applicant: Analog Devices, Inc.

Inventor： Yoshinori Kusuda

IPC: H03F3/45 ,  H03F3/393 ,  H03F1/26 ,  H03F1/30

Abstract: Chopper amplifiers with tracking of multiple input offsets are disclosed herein. In certain embodiments, a chopper amplifier includes chopper amplifier circuitry including an input chopping circuit, an amplification circuit, and an output chopping circuit electrically connected along a signal path. The amplification circuit includes two or more pairs of input transistors, from which a control circuit chooses a selected pair of input transistors to amplify an input signal. The chopper amplifier further incudes an offset correction circuit that senses the signal path to generate an input offset compensation signal for the amplification circuit. Furthermore, the offset correction circuit separately tracks an input offset of each of the two or more pairs of input transistors.

公开(公告)号：US20150288336A1

公开(公告)日：2015-10-08

申请号：US14263214

申请日：2014-04-28

Applicant: Analog Devices, Inc.

Inventor： Yoshinori Kusuda

IPC: H03F3/387 ,  H03F3/45

CPC classification number: H03F3/387 ,  H03F3/45475 ,  H03F3/45968 ,  H03F2200/252 ,  H03F2200/421 ,  H03F2203/45171

Abstract: Apparatus and methods for multi-channel autozero and chopper amplifiers are provided herein. In certain configurations, an amplifier includes at least three channels that operate using multiple phases, including at least a non-inverting chop phase, an inverting chop phase, and an autozero phase. The amplifier further includes an autozero and chopping timing control circuit, which at least partially interleaves or staggers timing of the channels' phases. For example, in certain configurations, when one or more of the channels are being autozeroed at a certain time instance, at least some of the remaining channels operate in the non-inverting chop phase or the inverting chop phase.

Abstract translation: 本文提供了多通道自动调零和斩波放大器的装置和方法。 在某些配置中，放大器包括至少三个使用多个相位操作的通道，其中至少包括非反相斩波相位，反相斩波相位和自动调零相位。 放大器还包括自动调零和斩波定时控制电路，其至少部分地交错或错开通道相位的定时。 例如，在某些配置中，当一个或多个信道在特定时间情况下被自动归零时，至少一些剩余信道在非反相斩波相位或反相斩波相位中操作。

公开(公告)号：US20250158578A1

公开(公告)日：2025-05-15

申请号：US18924349

申请日：2024-10-23

Applicant: Analog Devices, Inc.

Inventor： Arthur J. Kalb ,  Yoshinori Kusuda

IPC: H03F1/52 ,  H02H3/20 ,  H02M1/32

Abstract: Apparatus and methods for amplifier input-overvoltage protection with low leakage current are provided herein. In certain embodiments, amplifier input circuitry for an amplifier includes a pair of input terminals, a pair of input transistors each having a control input (for instance, a transistor gate), a pair of protection transistors each connected between one of the input terminals and the control input of a corresponding one of the input transistors, and a bidirectional clamp connected between the control inputs of the input transistors. Implementing the amplifier input circuitry in this manner provides a number of advantages including, but not limited to, robust protection against input overvoltage and low input-leakage current.

公开(公告)号：US20210382517A1

公开(公告)日：2021-12-09

申请号：US16946142

申请日：2020-06-08

Applicant: Analog Devices, Inc.

Inventor： Yoshinori Kusuda

IPC: G06F1/08 ,  G06F1/12 ,  H03L7/24 ,  H03L7/099 ,  H03M1/12

Abstract: Apparatus and methods for controlling a clock signal are provided. In certain embodiments, a semiconductor die includes a core circuit and a clock interface circuit that provides a clock signal to the core circuit. The clock interface circuit includes an oscillator for generating an oscillator signal, and a comparator for controlling operation of the clock interface circuit in a selected clock control mode based on comparing an electrical characteristic of the clock interface pin to a comparison threshold. The selected clock control mode is chosen from a first clock control mode in which the clock interface circuit generates the clock signal based on an input clock signal received on a clock interface pin, or a second clock control mode in which the clock interface circuit generates the clock signal based on the oscillator signal.

公开(公告)号：US20210367572A1

公开(公告)日：2021-11-25

申请号：US15929756

申请日：2020-05-20

Applicant: Analog Devices, Inc.

Inventor： Yoshinori Kusuda

IPC: H03F3/45

Abstract: Amplifiers with wide input range and low input capacitance are provided. In certain embodiments, an amplifier input stage includes a pair of input terminals, a pair of n-type input transistors, a first pair of isolation switches connected between the input terminals and the n-type input transistors, a pair of p-type input transistors, and a second pair of isolation switches connected between the input terminals and the p-type input transistors. The amplifier input stage further includes a control circuit that determines whether to use the n-type input transistors and/or the p-type input transistors for amplification based on a detected common-mode voltage of the input terminals. The control circuit opens the first pair of isolation switches to decouple the input terminals from the n-type input transistors when unused, and opens the second pair of isolation switches to decouple the input terminals from the p-type input transistors when unused.

公开(公告)号：US10804859B2

公开(公告)日：2020-10-13

申请号：US16214414

申请日：2018-12-10

Applicant: ANALOG DEVICES, INC.

Inventor： Simon Nicholas Fiedler Basilico ,  Yoshinori Kusuda

IPC: H03F1/00 ,  H03F1/08 ,  H03F3/45 ,  H03F3/68

Abstract: Transimpedance amplifiers with feedforward current are provided herein. In certain embodiments, an amplifier system includes a transimpedance amplifier that amplifies an input current received at an input to generate an output voltage at an output. The amplifier system further includes a controllable current source that is coupled to the output of the transimpedance amplifier, and operable to provide a feedforward current that changes in relation to the input current of the transimpedance amplifier. By providing a feedforward current in this manner, gain and speed performance of the transimpedance amplifier is enhanced.

公开(公告)号：US09246484B2

公开(公告)日：2016-01-26

申请号：US14201234

申请日：2014-03-07

Applicant: Analog Devices, Inc.

Inventor： Yoshinori Kusuda

IPC: G05F1/10 ,  H03K17/16 ,  H03M1/66

CPC classification number: H03F1/0205 ,  H03F3/387 ,  H03F3/45179 ,  H03F3/45183 ,  H03F3/45556 ,  H03F2203/45044 ,  H03F2203/45454 ,  H03F2203/45466 ,  H03F2203/45544 ,  H03F2203/45562 ,  H03F2203/45604 ,  H03F2203/45606 ,  H03F2203/45702 ,  H03K17/162 ,  H03M1/66

Abstract: Apparatus and methods for reducing input bias current of electronic circuits are provided herein. In certain implementations, an electronic circuit includes a first input terminal, a second input terminal, an input circuit, and a plurality of input switches including at least a first input switch and a second input switch. The first input switch is electrically connected between the first input terminal and a first input of the input circuit, the second input switch is electrically connected between the second input terminal and a second input of the input circuit, and the first and second input switches can be opened and closed using a clock signal. The electronic circuit further includes a charge compensation circuit for compensating for charge injection through the first and second input switches during transitions of the clock signal.

Abstract translation: 本文提供了用于减小电子电路的输入偏置电流的装置和方法。 在某些实施方式中，电子电路包括第一输入端，第二输入端，输入电路以及包括至少第一输入开关和第二输入开关的多个输入开关。 第一输入开关电连接在第一输入端和输入电路的第一输入端之间，第二输入开关电连接在第二输入端和输入电路的第二输入端之间，第一和第二输入开关可以 使用时钟信号打开和​​关闭。 电子电路还包括电荷补偿电路，用于在时钟信号转变期间补偿通过第一和第二输入开关的电荷注入。

公开(公告)号：US09123104B2

公开(公告)日：2015-09-01

申请号：US14204832

申请日：2014-03-11

Applicant: Analog Devices, Inc.

Inventor： Yoshinori Kusuda ,  Gary Robert Carreau ,  Michael C. Coln

IPC: H01L27/00 ,  G06T5/00 ,  H04L25/02

CPC classification number: G06T5/002 ,  H04L25/028

Abstract: Apparatus and methods reduce common-mode error. An integrated circuit includes a plurality of signal channels, a first proxy channel, and a subtraction block. The signal channels are configured to receive a plurality of input signals and to generate a plurality of output signals, and each of the signal channels has a substantially similar circuit topology. The first proxy channel has a substantially similar circuit topology as the plurality of signal channels, and includes an output that can vary in relation to a common-mode error of the signal channels. The subtraction block is configured to generate a plurality of modified output signals by using the output of the first proxy channel to reduce the common-mode error of the plurality of output signal channels.

Abstract translation: 装置和方法减少共模误差。 集成电路包括多个信号通道，第一代理通道和减法程序块。 信号通道被配置为接收多个输入信号并产生多个输出信号，并且每个信号通道具有基本相似的电路拓扑。 第一代理信道具有与多个信号信道基本类似的电路拓扑，并且包括可以相对于信号信道的共模误差而变化的输出。 减法块被配置为通过使用第一代理信道的输出来生成多个修改的输出信号，以减少多个输出信号信道的共模误差。

公开(公告)号：US20140193090A1

公开(公告)日：2014-07-10

申请号：US14204832

申请日：2014-03-11

Applicant: Analog Devices, Inc.

Inventor： Yoshinori Kusuda ,  Gary Robert Carreau ,  Michael C. Coln

IPC: G06T5/00

CPC classification number: G06T5/002 ,  H04L25/028

Abstract: Apparatus and methods reduce common-mode error. An integrated circuit includes a plurality of signal channels, a first proxy channel, and a subtraction block. The signal channels are configured to receive a plurality of input signals and to generate a plurality of output signals, and each of the signal channels has a substantially similar circuit topology. The first proxy channel has a substantially similar circuit topology as the plurality of signal channels, and includes an output that can vary in relation to a common-mode error of the signal channels. The subtraction block is configured to generate a plurality of modified output signals by using the output of the first proxy channel to reduce the common-mode error of the plurality of output signal channels.

Abstract translation: 装置和方法减少共模误差。 集成电路包括多个信号通道，第一代理通道和减法程序块。 信号通道被配置为接收多个输入信号并产生多个输出信号，并且每个信号通道具有基本相似的电路拓扑。 第一代理信道具有与多个信号信道基本类似的电路拓扑，并且包括可以相对于信号信道的共模误差而变化的输出。 减法块被配置为通过使用第一代理信道的输出来生成多个修改的输出信号，以减少多个输出信号信道的共模误差。