CHOPPER AMPLIFIERS WITH MULTIPLE SENSING POINTS FOR CORRECTING INPUT OFFSET

    公开(公告)号:US20210367569A1

    公开(公告)日:2021-11-25

    申请号:US15929815

    申请日:2020-05-22

    Inventor: Yoshinori Kusuda

    Abstract: Chopper amplifiers with multiple sensing points for correcting input offset are disclosed herein. In certain embodiments, a chopper amplifier includes chopper amplifier circuitry including an input chopping circuit, an amplification circuit, and an output chopping circuit electrically connected in a cascade along a signal path. The chopper amplifier further incudes a multi-point sensed offset correction circuit that generates an input offset compensation signal based on sensing a signal level of the signal path at multiple signal points. Furthermore, the multi-point sensed offset correction circuit injects the input offset compensation signal into the signal path to thereby compensate for input offset voltage of the amplification circuit while suppressing output chopping ripple from arising.

    Apparatus and methods for multi-channel autozero and chopper amplifiers
    3.
    发明授权
    Apparatus and methods for multi-channel autozero and chopper amplifiers 有权
    多通道自动调零和斩波放大器的装置和方法

    公开(公告)号:US09496833B2

    公开(公告)日:2016-11-15

    申请号:US14263214

    申请日:2014-04-28

    Inventor: Yoshinori Kusuda

    Abstract: Apparatus and methods for multi-channel autozero and chopper amplifiers are provided herein. In certain configurations, an amplifier includes at least three channels that operate using multiple phases, including at least a non-inverting chop phase, an inverting chop phase, and an autozero phase. The amplifier further includes an autozero and chopping timing control circuit, which at least partially interleaves or staggers timing of the channels' phases. For example, in certain configurations, when one or more of the channels are being autozeroed at a certain time instance, at least some of the remaining channels operate in the non-inverting chop phase or the inverting chop phase.

    Abstract translation: 本文提供了多通道自动调零和斩波放大器的装置和方法。 在某些配置中,放大器包括至少三个使用多个相位操作的通道,其中至少包括非反相斩波相位,反相斩波相位和自动调零相位。 放大器还包括自动调零和斩波定时控制电路,其至少部分地交错或错开通道相位的定时。 例如,在某些配置中,当一个或多个信道在特定时间情况下被自动归零时,至少一些剩余信道在非反相斩波相位或反相斩波相位中操作。

    Apparatus and methods for amplifier input-overvoltage protection with low leakage current

    公开(公告)号:US12132452B2

    公开(公告)日:2024-10-29

    申请号:US16946090

    申请日:2020-06-05

    CPC classification number: H03F1/52 H02H3/20 H02M1/32 H03F2200/441

    Abstract: Apparatus and methods for amplifier input-overvoltage protection with low leakage current are provided herein. In certain embodiments, amplifier input circuitry for an amplifier includes a pair of input terminals, a pair of input transistors each having a control input (for instance, a transistor gate), a pair of protection transistors each connected between one of the input terminals and the control input of a corresponding one of the input transistors, and a bidirectional clamp connected between the control inputs of the input transistors. Implementing the amplifier input circuitry in this manner provides a number of advantages including, but not limited to, robust protection against input overvoltage and low input-leakage current.

    Apparatus and methods for controlling a clock signal

    公开(公告)号:US11442494B2

    公开(公告)日:2022-09-13

    申请号:US16946142

    申请日:2020-06-08

    Inventor: Yoshinori Kusuda

    Abstract: Apparatus and methods for controlling a clock signal are provided. In certain embodiments, a semiconductor die includes a core circuit and a clock interface circuit that provides a clock signal to the core circuit. The clock interface circuit includes an oscillator for generating an oscillator signal, and a comparator for controlling operation of the clock interface circuit in a selected clock control mode based on comparing an electrical characteristic of the clock interface pin to a comparison threshold. The selected clock control mode is chosen from a first clock control mode in which the clock interface circuit generates the clock signal based on an input clock signal received on a clock interface pin, or a second clock control mode in which the clock interface circuit generates the clock signal based on the oscillator signal.

    TRANSIMPEDANCE AMPLIFIERS WITH FEEDFORWARD CURRENT

    公开(公告)号:US20200186098A1

    公开(公告)日:2020-06-11

    申请号:US16214414

    申请日:2018-12-10

    Abstract: Transimpedance amplifiers with feedforward current are provided herein. In certain embodiments, an amplifier system includes a transimpedance amplifier that amplifies an input current received at an input to generate an output voltage at an output. The amplifier system further includes a controllable current source that is coupled to the output of the transimpedance amplifier, and operable to provide a feedforward current that changes in relation to the input current of the transimpedance amplifier. By providing a feedforward current in this manner, gain and speed performance of the transimpedance amplifier is enhanced.

    Amplifiers with wide input range and low input capacitance

    公开(公告)号:US11251760B2

    公开(公告)日:2022-02-15

    申请号:US15929756

    申请日:2020-05-20

    Inventor: Yoshinori Kusuda

    Abstract: Amplifiers with wide input range and low input capacitance are provided. In certain embodiments, an amplifier input stage includes a pair of input terminals, a pair of n-type input transistors, a first pair of isolation switches connected between the input terminals and the n-type input transistors, a pair of p-type input transistors, and a second pair of isolation switches connected between the input terminals and the p-type input transistors. The amplifier input stage further includes a control circuit that determines whether to use the n-type input transistors and/or the p-type input transistors for amplification based on a detected common-mode voltage of the input terminals. The control circuit opens the first pair of isolation switches to decouple the input terminals from the n-type input transistors when unused, and opens the second pair of isolation switches to decouple the input terminals from the p-type input transistors when unused.

    APPARATUS AND METHODS FOR REDUCING INPUT BIAS CURRENT OF AN ELECTRONIC CIRCUIT
    8.
    发明申请
    APPARATUS AND METHODS FOR REDUCING INPUT BIAS CURRENT OF AN ELECTRONIC CIRCUIT 有权
    用于减少电子电路的输入偏置电流的装置和方法

    公开(公告)号:US20160126898A1

    公开(公告)日:2016-05-05

    申请号:US14993969

    申请日:2016-01-12

    Inventor: Yoshinori Kusuda

    Abstract: Apparatus and methods for reducing input bias current of electronic circuits are provided herein. In certain implementations, an electronic circuit includes a first input terminal, a second input terminal, an input circuit, and a plurality of input switches including at least a first input switch and a second input switch. The first input switch is electrically connected between the first input terminal and a first input of the input circuit, the second input switch is electrically connected between the second input terminal and a second input of the input circuit, and the first and second input switches can be opened and closed using a clock signal. The electronic circuit further includes a charge compensation circuit for compensating for charge injection through the first and second input switches during transitions of the clock signal.

    Abstract translation: 本文提供了用于减小电子电路的输入偏置电流的装置和方法。 在某些实施方式中,电子电路包括第一输入端,第二输入端,输入电路以及包括至少第一输入开关和第二输入开关的多个输入开关。 第一输入开关电连接在第一输入端和输入电路的第一输入端之间,第二输入开关电连接在第二输入端和输入电路的第二输入端之间,第一和第二输入开关可以 使用时钟信号打开和​​关闭。 电子电路还包括电荷补偿电路,用于在时钟信号转变期间补偿通过第一和第二输入开关的电荷注入。

    APPARATUS AND METHODS FOR INPUT BIAS CURRENT REDUCTION
    9.
    发明申请
    APPARATUS AND METHODS FOR INPUT BIAS CURRENT REDUCTION 有权
    输入偏置电流减少的装置和方法

    公开(公告)号:US20150256169A1

    公开(公告)日:2015-09-10

    申请号:US14201234

    申请日:2014-03-07

    Inventor: Yoshinori Kusuda

    Abstract: Apparatus and methods for reducing input bias current of electronic circuits are provided herein. In certain implementations, an electronic circuit includes a first input terminal, a second input terminal, an input circuit, and a plurality of input switches including at least a first input switch and a second input switch. The first input switch is electrically connected between the first input terminal and a first input of the input circuit, the second input switch is electrically connected between the second input terminal and a second input of the input circuit, and the first and second input switches can be opened and closed using a clock signal. The electronic circuit further includes a charge compensation circuit for compensating for charge injection through the first and second input switches during transitions of the clock signal.

    Abstract translation: 本文提供了用于减小电子电路的输入偏置电流的装置和方法。 在某些实施方式中,电子电路包括第一输入端,第二输入端,输入电路以及包括至少第一输入开关和第二输入开关的多个输入开关。 第一输入开关电连接在第一输入端和输入电路的第一输入端之间,第二输入开关电连接在第二输入端和输入电路的第二输入端之间,第一和第二输入开关可以 使用时钟信号打开和​​关闭。 电子电路还包括电荷补偿电路,用于在时钟信号转变期间补偿通过第一和第二输入开关的电荷注入。

    Chopper amplifiers with multiple sensing points for correcting input offset

    公开(公告)号:US11228291B2

    公开(公告)日:2022-01-18

    申请号:US15929815

    申请日:2020-05-22

    Inventor: Yoshinori Kusuda

    Abstract: Chopper amplifiers with multiple sensing points for correcting input offset are disclosed herein. In certain embodiments, a chopper amplifier includes chopper amplifier circuitry including an input chopping circuit, an amplification circuit, and an output chopping circuit electrically connected in a cascade along a signal path. The chopper amplifier further incudes a multi-point sensed offset correction circuit that generates an input offset compensation signal based on sensing a signal level of the signal path at multiple signal points. Furthermore, the multi-point sensed offset correction circuit injects the input offset compensation signal into the signal path to thereby compensate for input offset voltage of the amplification circuit while suppressing output chopping ripple from arising.

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