READ-HEAD PREAMPLIFIER HAVING INTERNAL OFFSET COMPENSATION
    1.
    发明申请
    READ-HEAD PREAMPLIFIER HAVING INTERNAL OFFSET COMPENSATION 有权
    具有内部偏移补偿的阅读前置放大器

    公开(公告)号:US20010043108A1

    公开(公告)日:2001-11-22

    申请号:US09318320

    申请日:1999-05-25

    发明人: ELANGO PAKRISWAMY

    IPC分类号: H03L005/00

    摘要: A circuit includes a differential amplifier that generates a differential offset signal on its output terminals. The circuit also includes an offset compensator that has input terminals respectively coupled to the amplifier output terminals and a compensation terminal coupled to the differential amplifier. The compensator maintains the differential offset signal at a predetermined value, for example 0 V. When used in an integrated read-head preamplifier, such a circuit compensates for the nonzero head bias voltage, i.e., the preamplifier input offset voltage, without using a component that is external to the integrated preamplifier circuit.

    摘要翻译: 电路包括在其输出端产生差分偏移信号的差分放大器。 电路还包括偏移补偿器,其具有分别耦合到放大器输出端子的输入端子和耦合到差分放大器的补偿端子。 补偿器将差分偏移信号保持在预定值,例如0V。当在集成读头前置放大器中使用时,这种电路补偿非零头偏置电压,即前置放大器输入偏移电压,而不使用组件 在集成前置放大器电路外部。

    Low voltage differential signal (LVDS) input circuit
    2.
    发明申请
    Low voltage differential signal (LVDS) input circuit 有权
    低电压差分信号(LVDS)输入电路

    公开(公告)号:US20010004219A1

    公开(公告)日:2001-06-21

    申请号:US09739263

    申请日:2000-12-19

    IPC分类号: H03K005/22

    摘要: Problems associated with using bipolar differential circuits over a wide common mode voltage range are solved using first and second amplifier circuits 3 and 5, respectively operating over first and second voltage sub-ranges. The low voltage differential signal (LVDS) 1 is applied across a pair of series connected resistors 7 and 9, and to the inputs of the amplifiers 3 and 5. The common mode voltage signal 11 is fed to the inputs of third and fourth amplifiers 15 and 17. The third and fourth amplifiers 15 and 17 ensure that the LVDS receiver has a constant linear transfer characteristic over the differential input signal range and over the full common mode range, especially over the amplifier transition region.

    摘要翻译: 使用分别在第一和第二电压子范围上工作的第一和第二放大器电路3和5来解决在宽共模电压范围内使用双极性差分电路相关的问题。 低电压差分信号(LVDS)1被施加在一对串联的电阻器7和9上以及放大器3和5的输入端上。共模电压信号11被馈送到第三和第四放大器15的输入端 第三和第四放大器15和17确保LVDS接收机在差分输入信号范围和整个共模范围内,特别是在放大器过渡区域上具有恒定的线性传递特性。

    Complementary output amplifier with an input for offsetting voltages
    5.
    发明授权
    Complementary output amplifier with an input for offsetting voltages 失效
    具有补偿电压输入的互补输出放大器

    公开(公告)号:US4543538A

    公开(公告)日:1985-09-24

    申请号:US631190

    申请日:1984-07-16

    申请人: Richard D. Fay

    发明人: Richard D. Fay

    IPC分类号: H03F3/45

    摘要: An amplifier circuit having first, second and third inputs and first and second input impedance elements connected respectively to the first and second inputs, a first differential stage connected between the first and second input impedance elements, first and second output stages connected to the differential stage outputs, the first and second output stages produce complementary voltage output signals on respective first and second outputs, first and second cross-coupled differential feedback loops linking the first output to the second input of the first differential stage and the second output to the first input of the first differential stage, the first and second outputs are linked to each other by a voltage divider circuit the midpoint of which is connected to one input of a second differential stage, the third input being the other input of the second differential stage, the output of the second differential amplifier causing a change in a current repeater circuit which in turn causes a change in the first and second output stages, and the changes in the output stages operating to cancel inphase noise and insert common mode portions into the complementary output signals.

    摘要翻译: 一种具有第一,第二和第三输入以及分别连接到第一和第二输入的第一和第二输入阻抗元件的放大器电路,连接在第一和第二输入阻抗元件之间的第一差分级,连接到差分级的第一和第二输出级 输出,第一和第二输出级在相应的第一和第二输出端产生互补电压输出信号,第一和第二交叉耦合的差分反馈回路将第一输出与第一差分级的第二输入相连,第二输出连接到第一输入 第一差分级的第一和第二输出通过分压电路彼此连接,分压电路的中点连接到第二差分级的一个输入,第三输入是第二差分级的另一输入, 第二差分放大器的输出导致在转速中的电流中继器电路的变化 n引起第一和第二输出级的变化,并且输出级的变化操作以消除同相噪声并将共模部分插入互补输出信号。

    Apparatus and methods for input bias current reduction
    6.
    发明授权
    Apparatus and methods for input bias current reduction 有权
    输入偏置电流降低的装置和方法

    公开(公告)号:US09246484B2

    公开(公告)日:2016-01-26

    申请号:US14201234

    申请日:2014-03-07

    发明人: Yoshinori Kusuda

    IPC分类号: G05F1/10 H03K17/16 H03M1/66

    摘要: Apparatus and methods for reducing input bias current of electronic circuits are provided herein. In certain implementations, an electronic circuit includes a first input terminal, a second input terminal, an input circuit, and a plurality of input switches including at least a first input switch and a second input switch. The first input switch is electrically connected between the first input terminal and a first input of the input circuit, the second input switch is electrically connected between the second input terminal and a second input of the input circuit, and the first and second input switches can be opened and closed using a clock signal. The electronic circuit further includes a charge compensation circuit for compensating for charge injection through the first and second input switches during transitions of the clock signal.

    摘要翻译: 本文提供了用于减小电子电路的输入偏置电流的装置和方法。 在某些实施方式中,电子电路包括第一输入端,第二输入端,输入电路以及包括至少第一输入开关和第二输入开关的多个输入开关。 第一输入开关电连接在第一输入端和输入电路的第一输入端之间,第二输入开关电连接在第二输入端和输入电路的第二输入端之间,第一和第二输入开关可以 使用时钟信号打开和​​关闭。 电子电路还包括电荷补偿电路,用于在时钟信号转变期间补偿通过第一和第二输入开关的电荷注入。

    Differential circuit compensating gain enhancement due to self heating of transistors
    8.
    发明授权
    Differential circuit compensating gain enhancement due to self heating of transistors 有权
    由于晶体管的自身加热,差分电路补偿增益

    公开(公告)号:US08941440B2

    公开(公告)日:2015-01-27

    申请号:US13778320

    申请日:2013-02-27

    IPC分类号: H03F3/45 H03F3/08

    摘要: A differential circuit with a function to compensate the gain enhancement due to the self-heating of the transistor is disclosed. The differential circuit includes an equalizer unit coupled with one of paired transistors. The other of the paired transistor receives the input signal to be amplified. The base level, or the base-emitter bias, is oppositely modulated by the input signal through the common emitter, which causes the modification of the base current. The equalizer unit reduces the variation of the base level only in low frequencies where the self-heating effect of the transistor appears.

    摘要翻译: 公开了一种具有补偿由于晶体管的自加热引起的增益增强的功能的差分电路。 差分电路包括与成对晶体管中的一个耦合的均衡器单元。 配对晶体管中的另一个接收要放大的输入信号。 基极电平或基极 - 发射极偏压通过共同发射极的输入信号相反调制,这导致基极电流的修改。 均衡器单元仅在晶体管的自发热效应出现的低频下降低基极电平的变化。

    DIFFERENTIAL CIRCUIT COMPENSATING GAIN ENHANCEMENT DUE TO SELF HEATING OF TRANSISTORS
    9.
    发明申请
    DIFFERENTIAL CIRCUIT COMPENSATING GAIN ENHANCEMENT DUE TO SELF HEATING OF TRANSISTORS 有权
    由于晶体管的自发加热导致的差分电路增益增益

    公开(公告)号:US20130229231A1

    公开(公告)日:2013-09-05

    申请号:US13778320

    申请日:2013-02-27

    IPC分类号: H03F3/45

    摘要: A differential circuit with a function to compensate the gain enhancement due to the self-heating of the transistor is disclosed. The differential circuit includes an equalizer unit coupled with one of paired transistors. The other of the paired transistor receives the input signal to be amplified. The base level, or the base-emitter bias, is oppositely modulated by the input signal through the common emitter, which causes the modification of the base current. The equalizer unit reduces the variation of the base level only in low frequencies where the self-heating effect of the transistor appears.

    摘要翻译: 公开了一种具有补偿由于晶体管的自加热引起的增益增强的功能的差分电路。 差分电路包括与成对晶体管中的一个耦合的均衡器单元。 配对晶体管中的另一个接收要放大的输入信号。 基极电平或基极 - 发射极偏压通过共同发射极的输入信号相反调制,这导致基极电流的修改。 均衡器单元仅在晶体管的自发热效应出现的低频下降低基极电平的变化。

    Attenuator control circuit
    10.
    发明授权

    公开(公告)号:US06600372B2

    公开(公告)日:2003-07-29

    申请号:US10007479

    申请日:2001-12-03

    申请人: John S. Prentice

    发明人: John S. Prentice

    IPC分类号: H03F345

    摘要: An attenuator control circuit for controlling operation of a differential pair attenuator to provide linear in decibels (dB) operation and temperature and process-independent operation. The attenuator control circuit is coupled in parallel with corresponding control input terminals of the attenuator differential pair. The attenuator control circuit also includes a current control circuit that sources a supply current to the control differential pair. The attenuator control circuit also includes an amplifier that controls current through the first current path of the control differential pair to maintain constant total current, so that the first current path exhibits the desired exponential attenuation function. Since the control differential pair is coupled in parallel with the differential pair attenuator, the output current of the differential pair attenuator also exhibits the desired exponential attenuation function. Furthermore, the attenuator control circuit includes a temperature compensation circuit that applies a temperature proportional voltage to compensate for temperature variations.