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公开(公告)号：US06802045B1
公开(公告)日：2004-10-05
申请号：US09838498
申请日：2001-04-19
IPC分类号： G06F1750
CPC分类号： H01L22/20 , G05B19/41885 , G05B2219/32354 , G05B2219/32364 , G05B2219/45031 , Y02P90/26
摘要： The present invention provides for a method and an apparatus for implementing a control simulation environment into a manufacturing environment. A process task is defined. A process simulation function is performed to produce simulation data corresponding to the process task. The simulation data is integrated with a process control environment for controlling a manufacturing process of a semiconductor device.
摘要翻译： 本发明提供了一种用于将控制仿真环境实现到制造环境中的方法和装置。 定义流程任务。 执行过程模拟功能以产生对应于过程任务的模拟数据。 仿真数据与用于控制半导体器件的制造工艺的过程控制环境集成。
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12.发明授权Automated variation of stepper exposure dose based upon across wafer variations in device characteristics, and system for accomplishing same 失效基于设备特性的晶片变化的步进曝光剂量的自动变化，以及用于实现其的系统公开(公告)号：US06784001B2
公开(公告)日：2004-08-31
申请号：US10094117
申请日：2002-03-08
IPC分类号： H01L2166
CPC分类号： G03F7/70483 , H01L22/20
摘要： A novel method and system for fabricating integrated circuit devices is disclosed herein. In one embodiment, the method comprises determining at least one electrical performance characteristic of a plurality of semiconductor devices formed above at least one semiconducting substrate, providing the determined electrical performance characteristics to a controller that determines, based upon the determined electrical characteristics, across-substrate variations in an exposure dose of a stepper exposure process to be performed on at least one subsequently processed substrate, and performing the stepper exposure process comprised of the across-substrate variations in exposure dose on the subsequently processed substrates. The system comprises a metrology tool for determining an electrical performance characteristic of a plurality of semiconductor devices formed above at least one substrate, a controller that determines, based upon the determined electrical performance characteristics, across-substrate variations in an exposure dose of a stepper exposure process to be performed on subsequently processed substrates, and a stepper tool that performs the stepper exposure process comprised of the across-substrate variations in exposure dose on the subsequently processed substrates.
摘要翻译： 本文公开了一种用于制造集成电路器件的新颖方法和系统。 在一个实施例中，该方法包括确定在至少一个半导体衬底上方形成的多个半导体器件的至少一个电性能特性，将确定的电性能特性提供给控制器，该控制器基于确定的电特性来确定跨衬底 将对至少一个随后处理的基板进行步进曝光处理的曝光剂量的变化，以及对随后处理的基板上的曝光剂量的跨基板变化进行步进曝光处理。 该系统包括用于确定在至少一个衬底上形成的多个半导体器件的电性能特征的计量工具，控制器，其基于确定的电性能特性确定步进曝光的曝光剂量中的跨衬底变化 在后续处理的基板上执行的处理以及执行步进曝光处理的步进工具，其包括曝光剂量对随后处理的基板的跨基板变化。
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13.发明授权公开(公告)号：US06595830B1
公开(公告)日：2003-07-22
申请号：US09817532
申请日：2001-03-26
IPC分类号： B24B5100
CPC分类号： B24B37/013 , B24B37/042 , B24B49/12 , H01L21/3212
摘要： The present invention is directed to a method of polishing wafers on a polishing tool comprised of first, second and third platens. The method comprises providing a wafer having a patterned layer of insulating material, a barrier metal layer, and a metal layer formed above the wafer, performing a first polishing operation on the wafer at the first platen to remove a majority of the metal layer above the barrier metal layer, and performing an endpoint polishing operation on the wafer at the second platen to remove at least some of the metal layer. The method further comprises performing a timed overpolish operation on the wafer at the second platen after the endpoint polishing operation is completed at the second platen, performing a timed polishing operation on the wafer at the third platen to remove at least some of the barrier metal layer, determining an erosion rate of the patterned layer of insulating material, providing the determined erosion rate to a controller that determines a duration of the timed overpolish operations to be performed on at least one subsequently processed wafer at the second platen, and performing the timed overpolish operation on the at least one subsequently processed wafer at the second platen for the duration determined by the controller.
摘要翻译： 本发明涉及一种在由第一，第二和第三压板构成的抛光工具上抛光晶片的方法。 该方法包括提供具有绝缘材料图案化层，阻挡金属层和形成在晶片上方的金属层的晶片，在第一压板上在晶片上执行第一抛光操作，以去除位于第一压板上方的大部分金属层 并且在所述第二压板处对所述晶片执行终点抛光操作以去除所述金属层中的至少一些。 该方法还包括在第二压板上完成终点抛光操作之后，在第二压板上对晶片进行定时过多的操作，对第三压板上的晶片进行定时抛光操作，以去除至少一些阻挡金属层 确定所述图案化绝缘材料层的侵蚀速率，将所确定的腐蚀速率提供给控制器，所述控制器确定在所述第二压板上对至少一个随后处理过的晶片执行的所述定时过度抛光操作的持续时间，以及执行所述定时过度抛光 在由控制器确定的持续时间内，在第二压板上对至少一个随后处理的晶片进行操作。
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14.发明授权Automated variation of stepper exposure dose based upon across wafer variations in device characteristics, and system for accomplishing same 有权基于设备特性的晶片变化的步进曝光剂量的自动变化，以及用于实现其的系统公开(公告)号：US06365422B1
公开(公告)日：2002-04-02
申请号：US09766737
申请日：2001-01-22
IPC分类号： H01L2166
CPC分类号： G03F7/70483 , H01L22/20
摘要： A novel method and system for fabricating integrated circuit devices is disclosed herein. In one embodiment, the method comprises determining at least one electrical performance characteristic of a plurality of semiconductor devices formed above at least one semiconducting substrate, providing the determined electrical performance characteristics to a controller that determines, based upon the determined electrical characteristics, across-substrate variations in an exposure dose of a stepper exposure process to be performed on at least one subsequently processed substrate, and performing the stepper exposure process comprised of the across-substrate variations in exposure dose on the subsequently processed substrates. The system comprises a metrology tool for determining an electrical performance characteristic of a plurality of semiconductor devices formed above at least one substrate, a controller that determines, based upon the determined electrical performance characteristics, across-substrate variations in an exposure dose of a stepper exposure process to be performed on subsequently processed substrates, and a stepper tool that performs the stepper exposure process comprised of the across-substrate variations in exposure dose on the subsequently processed substrates.
摘要翻译： 本文公开了一种用于制造集成电路器件的新颖方法和系统。 在一个实施例中，该方法包括确定在至少一个半导体衬底上方形成的多个半导体器件的至少一个电性能特性，将确定的电性能特性提供给控制器，所述控制器基于所确定的电特性确定跨衬底 将对至少一个随后处理的基板进行步进曝光处理的曝光剂量的变化，以及对随后处理的基板上的曝光剂量的跨基板变化进行步进曝光处理。 该系统包括用于确定在至少一个衬底上形成的多个半导体器件的电性能特征的计量工具，控制器，其基于确定的电性能特性确定步进曝光的曝光剂量中的跨衬底变化 在后续处理的基板上执行的处理以及执行步进曝光处理的步进工具，其包括曝光剂量对随后处理的基板的跨基板变化。
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15.发明授权Method of controlling the duration of an endpoint polishing process in a multistage polishing process 失效控制多级抛光工艺中终点抛光工艺持续时间的方法公开(公告)号：US06746958B1
公开(公告)日：2004-06-08
申请号：US09817536
申请日：2001-03-26
IPC分类号： H01L214763
CPC分类号： B24B37/013 , B24B37/042 , H01L21/7684
摘要： The present invention is directed to a method of controlling chemical mechanical polishing operations to control the duration of an endpoint polishing process. The method comprises providing a wafer having a layer of copper formed thereabove, performing a first timed polishing operation for a duration (t1) on the layer of copper at a first platen to remove a majority of the layer of copper, performing an endpoint polishing operation on the layer of copper at a second platen to remove substantially all of the layer of copper, determining a duration (t2ept) of the endpoint polishing operation performed on the layer of copper at the second platen, and determining, based upon a comparison between the determined duration (t2ept) of the endpoint polishing operation and a target value for the duration of the endpoint polishing operations, a duration (t1) of the timed polishing operation to be performed on a subsequently processed layer of copper at the first platen. In another embodiment, the invention further comprises modifying, based upon a variance between the determined duration (t2ept) of the endpoint polishing operation and a target value for the duration (t2ept) of the endpoint polishing operation, the duration (t1) of the timed polishing operation to be performed on a subsequently processed layer of copper at the first platen.
摘要翻译： 本发明涉及一种控制化学机械抛光操作以控制端点抛光工艺的持续时间的方法。 该方法包括提供具有形成在其上的铜层的晶片，在第一压板上在铜层上执行持续时间（t1）的第一定时抛光操作以去除大部分铜层，执行端点抛光操作 在第二压板上的铜层上去除基本上所有的铜层，确定在第二压板上对铜层执行的端点抛光操作的持续时间（t2
），并且基于 在终点抛光操作的确定的持续时间（t2 ）与终点抛光操作的持续时间的目标值之间进行比较，对后续处理的铜层执行的定时抛光操作的持续时间（t1） 第一个压板。 在另一个实施例中，本发明还包括基于端点抛光操作的所确定的持续时间（t2 ）与端点抛光操作的持续时间（t2 ）的目标值之间的差异来修改，持续时间 （t1）对在第一压板上的后续处理的铜层进行的定时抛光操作。 -
公开(公告)号：US06442496B1
公开(公告)日：2002-08-27
申请号：US09633930
申请日：2000-08-08
IPC分类号： H01L2100
CPC分类号： H01L21/67276 , H01L22/20
摘要： The present invention provides for a method and an apparatus for performing dynamic sampling of a production line. A first plurality of semiconductor wafers are processed. A minimum sampling rate of semiconductor wafers is calculated. Wafers from the first plurality of the semiconductor wafers are selected and analyzed at the calculated sampling rate. The performance of the processing of the first plurality of semiconductor wafers is quantified, based upon the analyzed wafers. A dynamic sampling process is performed based upon the quantification of the performance of the processing of semiconductor wafers.
摘要翻译： 本发明提供一种用于进行生产线的动态取样的方法和装置。 处理第一多个半导体晶片。 计算半导体晶片的最小采样率。 以所计算的采样率选择和分析来自第一多个半导体晶片的晶片。 基于分析的晶片来量化第一多个半导体晶片的处理性能。 基于对半导体晶片的处理的性能的量化来执行动态采样处理。
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17.发明授权Method and apparatus for using a dynamic control model to compensate for a process interrupt 有权用于使用动态控制模型来补偿过程中断的方法和装置公开(公告)号：US06725121B1
公开(公告)日：2004-04-20
申请号：US09864692
申请日：2001-05-24
IPC分类号： G06F1900
CPC分类号： G05B19/41865 , G05B2219/32237 , G05B2219/32249 , Y02P90/20 , Y02P90/86
摘要： A method for processing an interrupted workpiece includes providing a dynamic control model defining the processing characteristics of a processing tool throughout a processing run; providing a partially processed workpiece; determining an extent of processing metric for the partially processed workpiece; and determining at least one operating recipe parameter of the processing tool based on the dynamic control model and the extent of processing metric. A manufacturing system includes a processing tool and a process controller. The processing tool is adapted to process a partially processed workpiece in accordance with an operating recipe. The process controller is adapted to determine an extent of processing metric for the partially processed workpiece and determine at least one parameter of the operating recipe based on a dynamic control model defining the processing characteristics of the processing tool throughout a processing run and the extent of processing metric.
摘要翻译： 一种用于处理中断的工件的方法包括提供定义整个处理过程中处理工具的处理特性的动态控制模型; 提供部分加工的工件; 确定部分加工的工件的加工度量的程度; 以及基于所述动态控制模型和所述处理度量的程度来确定所述处理工具的至少一个操作配方参数。 制造系统包括处理工具和过程控制器。 处理工具适于根据操作配方处理部分处理的工件。 过程控制器适于确定部分处理的工件的处理度量的程度，并且基于在整个处理运行中定义处理工具的处理特性的动态控制模型以及处理程度来确定操作配方的至少一个参数 度量。
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公开(公告)号：US06540591B1
公开(公告)日：2003-04-01
申请号：US09837606
申请日：2001-04-18
IPC分类号： B24B100
CPC分类号： B24B37/013 , B24B21/10 , B24B37/042 , B24B49/04
摘要： A method for polishing wafers includes providing a wafer having a process layer formed thereon; providing a polishing tool having a plurality of control zones and being adapted to polish the process layer based on an operating recipe, the operating recipe having a control variable corresponding to each of the control zones; measuring a pre-polish thickness profile of the process layer; comparing the pre-polish thickness profile to a target thickness profile to determine a desired removal profile; determining values for the control variables associated with the control zones based on the desired removal profile; and modifying the operating recipe of the polishing tool based on the values determined for the control variables. A processing line includes a polishing tool, a metrology tool, and a process controller. The polishing tool is adapted to polish a wafer having a process layer formed thereon based on an operating recipe. The polishing tool includes a plurality of control zones and the operating recipe includes a control variable corresponding to each of the control zones. The metrology tool is adapted to measure a pre-polish thickness profile of the process layer. The process controller is adapted to compare the pre-polish thickness profile to a target thickness profile to determine a desired removal profile, determine values for the control variables associated with the control zones based on the desired removal profile, and modify the operating recipe of the polishing tool based on the values determined for the control variables.
摘要翻译： 抛光晶片的方法包括提供其上形成有工艺层的晶片; 提供具有多个控制区域并且适于基于操作配方抛光所述处理层的抛光工具，所述操作配方具有对应于每个所述控制区域的控制变量; 测量处理层的预抛光厚度轮廓; 将预抛光厚度轮廓与目标厚度轮廓进行比较以确定期望的移除轮廓; 基于期望的移除轮廓来确定与控制区域相关联的控制变量的值; 并且基于为控制变量确定的值来修改抛光工具的操作配方。 处理线包括抛光工具，计量工具和过程控制器。 抛光工具适于基于操作配方抛光其上形成有工艺层的晶片。 抛光工具包括多个控制区，操作配方包括对应于每个控制区的控制变量。 测量工具适用于测量工艺层的预抛光厚度轮廓。 过程控制器适于将预抛光厚度分布与目标厚度分布进行比较以确定期望的去除曲线，基于期望的去除曲线来确定与控制区域相关联的控制变量的值，并修改其中的操作配方 基于为控制变量确定的值的抛光工具。
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19.发明授权Method and apparatus for modeling thickness profiles and controlling subsequent etch process 有权用于建模厚度剖面和控制后续蚀刻工艺的方法和装置公开(公告)号：US06410351B1
公开(公告)日：2002-06-25
申请号：US09615481
申请日：2000-07-13
IPC分类号： H01L214763
CPC分类号： H01L22/20
摘要： A processing line includes a deposition tool, a metrology tool, an etch tool, and a process controller. The deposition tool is adapted to form a process layer on a plurality of wafers. The metrology tool is adapted to measure the thickness of the process layer for a sample of the wafers. The etch tool is adapted to etch the process layer in accordance with an operating recipe. The process controller is adapted to store a thickness profile model of the deposition tool, generate predicted process layer thicknesses for the wafers not measured by the metrology tool based on the process layer thickness measurements of the wafers in the sample and the thickness profile model, and modify the operating recipe of the etch tool based on the predicted process layer thicknesses. A method for controlling wafer uniformity includes storing a thickness profile model of a deposition tool; depositing a process layer on a plurality of wafers in the deposition tool; measuring the thickness of the process layer for a sample of the wafers; generating predicted process layer thicknesses for the wafers not measured based on the process layer thickness measurements and the thickness profile model; and etching the process layer in an etching tool in accordance with an operating recipe, the operating recipe being based on the predicted process layer thicknesses.
摘要翻译： 处理线包括沉积工具，计量工具，蚀刻工具和过程控制器。 沉积工具适于在多个晶片上形成工艺层。 测量工具适于测量晶片样品的工艺层的厚度。 蚀刻工具适于根据操作配方蚀刻工艺层。 过程控制器适于存储沉积工具的厚度剖面模型，基于样品中的晶片的过程层厚度测量和厚度剖面模型，生成未被测量工具测量的晶片的预测处理层厚度，以及 基于预测的处理层厚度修改蚀刻工具的操作配方。 一种用于控制晶片均匀性的方法包括：存储沉积工具的厚度剖面模型; 在所述沉积工具中的多个晶片上沉积工艺层; 测量晶片样品的工艺层的厚度; 根据工艺层厚度测量和厚度剖面模型，生成未测量晶片的预测工艺层厚度; 并且根据操作配方在蚀刻工具中蚀刻处理层，操作配方基于预测的处理层厚度。
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公开(公告)号：US06622061B1
公开(公告)日：2003-09-16
申请号：US10160963
申请日：2002-05-31
IPC分类号： G06F1900
CPC分类号： G03F7/70633 , H01L22/20
摘要： The present invention provides for a method and apparatus for correction of overlay control errors. Semiconductor devices are processed based upon control input parameters. The processed semiconductor devices are examined in a review station. The control input parameters are modified in response to the examination of the processed semiconductor devices. New control input parameters are implemented for a subsequent run of the semiconductor device processing step based upon the modification of the control input parameters.
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