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公开(公告)号：US20180217344A1
公开(公告)日：2018-08-02
申请号：US15886822
申请日：2018-02-01
Applicant: Ayar Labs, Inc.
Inventor： John Fini , Roy Edward Meade , Mark Wade , Chen Sun , Vladimir Stojanovic , Alexandra Wright
CPC classification number: G02B6/43 , G02B6/4216 , H04B10/40 , H04B10/801
Abstract: An optical module includes a laser light supply system and a chip disposed within a housing. The chip includes a laser input optical port and a transmit data optical port and a receive data optical port. The optical module includes a link-fiber interface exposed at an exterior surface of the housing. The link-fiber interface includes a transmit data connector and a receive data connector. The optical module includes a polarization-maintaining optical fiber connected between a laser output optical port of the laser light supply system and the laser input optical port of the chip. The optical module includes a first non-polarization-maintaining optical fiber connected between the transmit data optical port of the chip and the transmit data connector of the link-fiber interface. The optical module includes a second non-polarization-maintaining optical fiber connected between the receive data optical port of the chip and the receive data connector of the link-fiber interface.
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公开(公告)号：US20240310589A1
公开(公告)日：2024-09-19
申请号：US18675112
申请日：2024-05-27
Applicant: Ayar Labs, Inc.
Inventor： Alexandra Wright , Mark Wade , Chen Sun , Vladimir Stojanovic , Rajeev Ram , Milos Popovic , Roy Edward Meade , Derek Van Orden
CPC classification number: G02B6/4202 , G02B6/2934 , G02B6/4216 , G02B6/4219 , G02B6/4287
Abstract: An optical input/output chiplet is disposed on a first package substrate. The optical input/output chiplet includes one or more supply optical ports for receiving continuous wave light. The optical input/output chiplet includes one or more transmit optical ports through which modulated light is transmitted. The optical input/output chiplet includes one or more receive optical ports through which modulated light is received by the optical input/output chiplet. An optical power supply module is disposed on a second package substrate. The second package substrate is separate from the first package substrate. The optical power supply module includes one or more output optical ports through which continuous wave laser light is transmitted. A set of optical fibers optically connect the one or more output optical ports of the optical power supply module to the one or more supply optical ports of the optical input/output chiplet.
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公开(公告)号：US20240061181A1
公开(公告)日：2024-02-22
申请号：US18499093
申请日：2023-10-31
Applicant: Ayar Labs, Inc.
Inventor： Shahab Ardalan , Michael Davenport , Roy Edward Meade
CPC classification number: G02B6/30 , H01L21/565 , G02B6/122 , G02B6/428
Abstract: A package assembly includes a silicon photonics chip having an optical waveguide exposed at a first side of the chip and an optical fiber coupling region formed along the first side of the chip. The package assembly includes a mold compound structure formed to extend around second, third, and fourth sides of the chip. The mold compound structure has a vertical thickness substantially equal to a vertical thickness of the chip. The package assembly includes a redistribution layer formed over the chip and over a portion of the mold compound structure. The redistribution layer includes electrically conductive interconnect structures to provide fanout of electrical contacts on the chip to corresponding electrical contacts on the redistribution layer. The redistribution layer is formed to leave the optical fiber coupling region exposed. An optical fiber is connected to the optical fiber coupling region in optical alignment with the optical waveguide within the chip.
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公开(公告)号：US11822128B2
公开(公告)日：2023-11-21
申请号：US17516602
申请日：2021-11-01
Applicant: Ayar Labs, Inc.
Inventor： Shahab Ardalan , Michael Davenport , Roy Edward Meade
CPC classification number: G02B6/30 , G02B6/122 , H01L21/565 , G02B6/428
Abstract: A package assembly includes a silicon photonics chip having an optical waveguide exposed at a first side of the chip and an optical fiber coupling region formed along the first side of the chip. The package assembly includes a mold compound structure formed to extend around second, third, and fourth sides of the chip. The mold compound structure has a vertical thickness substantially equal to a vertical thickness of the chip. The package assembly includes a redistribution layer formed over the chip and over a portion of the mold compound structure. The redistribution layer includes electrically conductive interconnect structures to provide fanout of electrical contacts on the chip to corresponding electrical contacts on the redistribution layer. The redistribution layer is formed to leave the optical fiber coupling region exposed. An optical fiber is connected to the optical fiber coupling region in optical alignment with the optical waveguide within the chip.
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公开(公告)号：US20230370170A1
公开(公告)日：2023-11-16
申请号：US18354379
申请日：2023-07-18
Applicant: Ayar Labs, Inc.
Inventor： Roy Edward Meade , Vladimir Stojanovic , Chen Sun , Mark Wade , Hugo Saleh , Charles Wuischpard
CPC classification number: H04B10/80 , G02B6/4249 , G02B6/4274 , G11C5/04 , G11C5/06 , G11C5/141 , G11C11/42 , H04B10/516
Abstract: A computer memory system includes an electro-optical chip, an electrical fanout chip electrically connected to an electrical interface of the electro-optical chip, and at least one dual in-line memory module (DIMM) slot electrically connected to the electrical fanout chip. A photonic interface of the electro-optical chip is optically connected to an optical link. The electro-optical chip includes at least one optical macro that converts outgoing electrical data signals into outgoing optical data signals for transmission through the optical link. The optical macro also converts incoming optical data signals from the optical link into incoming electrical data signals and transmits the incoming electrical data signals to the electrical fanout chip. The electrical fanout chip directs bi-directional electrical data communication between the electro-optical chip and a dynamic random access memory (DRAM) DIMM corresponding to the at least one DIMM slot.
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Patent Agency Ranking
公开(公告)号：US11500153B2
公开(公告)日：2022-11-15
申请号：US17070601
申请日：2020-10-14
Applicant: Ayar Labs, Inc.
Inventor： Roy Edward Meade , Chong Zhang , Haiwei Lu , Chen Li
Abstract: A multi-chip package assembly includes a substrate, a first semiconductor chip attached to the substrate, and a second semiconductor chip attached to the substrate, such that a portion of the second semiconductor chip overhangs an edge of the substrate. A first v-groove array for receiving a plurality of optical fibers is present within the portion of the second semiconductor chip that overhangs the edge of the substrate. An optical fiber assembly including the plurality of optical fibers is positioned and secured within the first v-groove array of the second semiconductor chip. The optical fiber assembly includes a second v-groove array configured to align the plurality of optical fibers to the first v-groove array of the second semiconductor chip. An end of each of the plurality of optical fibers is exposed for optical coupling within an optical fiber connector located at a distal end of the optical fiber assembly.
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公开(公告)号：US20220360336A1
公开(公告)日：2022-11-10
申请号：US17866482
申请日：2022-07-16
Applicant: Ayar Labs, Inc.
Inventor： Chen Sun , Roy Edward Meade , Mark Wade , Alexandra Wright , Vladimir Stojanovic , Rajeev Ram , Milos Popovic , Derek Van Orden , Michael Davenport
IPC: H04B10/50 , H01S5/40 , H01S5/026 , H04B10/80 , H01S5/02325
Abstract: An interposer device includes a substrate that includes a laser source chip interface region, a silicon photonics chip interface region, an optical amplifier module interface region. A fiber-to-interposer connection region is formed within the substrate. A first group of optical conveyance structures is formed within the substrate to optically connect a laser source chip to a silicon photonics chip when the laser source chip and the silicon photonics chip are interfaced to the substrate. A second group of optical conveyance structures is formed within the substrate to optically connect the silicon photonics chip to an optical amplifier module when the silicon photonics chip and the optical amplifier module are interfaced to the substrate. A third group of optical conveyance structures is formed within the substrate to optically connect the optical amplifier module to the fiber-to-interposer connection region when the optical amplifier module is interfaced to the substrate.
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公开(公告)号：US20220163723A1
公开(公告)日：2022-05-26
申请号：US17531678
申请日：2021-11-19
Applicant: Ayar Labs, Inc.
Inventor： Roy Edward Meade
Abstract: A multi-MCP (multi-chip package) module assembly includes a plate, an integrated optical fiber shuffle disposed on the plate, a first MCP disposed on the plate, a second MCP disposed on the plate, a first optical fiber jumper disposed on the plate, and a second optical fiber jumper disposed on the plate. The first optical fiber jumper optically connects the first MCP to the integrated optical fiber shuffle. The second optical fiber jumper optically connects the second MCP to the integrated optical fiber shuffle. The integrated optical fiber shuffle includes an optical network configured to direct optical signals to and from each of the first optical fiber jumper and the second optical fiber jumper.
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公开(公告)号：US11249260B2
公开(公告)日：2022-02-15
申请号：US16937428
申请日：2020-07-23
Applicant: Ayar Labs, Inc.
Inventor： Alexandra Wright , Mark Wade , Chen Sun , Vladimir Stojanovic , Rajeev Ram , Milos Popovic , Roy Edward Meade , Derek Van Orden
Abstract: An optical input/output chiplet is disposed on a first package substrate. The optical input/output chiplet includes one or more supply optical ports for receiving continuous wave light. The optical input/output chiplet includes one or more transmit optical ports through which modulated light is transmitted. The optical input/output chiplet includes one or more receive optical ports through which modulated light is received by the optical input/output chiplet. An optical power supply module is disposed on a second package substrate. The second package substrate is separate from the first package substrate. The optical power supply module includes one or more output optical ports through which continuous wave laser light is transmitted. A set of optical fibers optically connect the one or more output optical ports of the optical power supply module to the one or more supply optical ports of the optical input/output chiplet.
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公开(公告)号：US11163120B2
公开(公告)日：2021-11-02
申请号：US16685838
申请日：2019-11-15
Applicant: Ayar Labs, Inc.
Inventor： Shahab Ardalan , Michael Davenport , Roy Edward Meade
Abstract: A package assembly includes a silicon photonics chip having an optical waveguide exposed at a first side of the chip and an optical fiber coupling region formed along the first side of the chip. The package assembly includes a mold compound structure formed to extend around second, third, and fourth sides of the chip. The mold compound structure has a vertical thickness substantially equal to a vertical thickness of the chip. The package assembly includes a redistribution layer formed over the chip and over a portion of the mold compound structure. The redistribution layer includes electrically conductive interconnect structures to provide fanout of electrical contacts on the chip to corresponding electrical contacts on the redistribution layer. The redistribution layer is formed to leave the optical fiber coupling region exposed. An optical fiber is connected to the optical fiber coupling region in optical alignment with the optical waveguide within the chip.
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