ARRAY SUBSTRATE, DISPLAY PANEL AND METHOD OF MANUFACTURING THIN FILM TRANSISTOR
    11.
    发明申请
    ARRAY SUBSTRATE, DISPLAY PANEL AND METHOD OF MANUFACTURING THIN FILM TRANSISTOR 有权
    阵列基板,显示面板及制造薄膜晶体管的方法

    公开(公告)号:US20160118415A1

    公开(公告)日:2016-04-28

    申请号:US14744557

    申请日:2015-06-19

    CPC classification number: H01L29/78642 H01L27/1222

    Abstract: An array substrate, a display panel and a method of manufacturing a thin film transistor (TFT) are provided. The array substrate includes a base substrate and a thin film transistor (TFT) formed on the base substrate, and the TFT includes a gate electrode, a gate insulating layer, an active layer, source/drain electrodes and an interlayer insulating layer. The source/drain electrodes include a first electrode and a second electrode, and the interlayer insulating layer is located between the first electrode and the second electrode. The gate electrode, the gate insulating layer and the active layer are arranged sequentially in a direction perpendicular to a thickness direction of the array substrate, and the first electrode, the interlayer insulating layer and the second electrode are arranged sequentially in the thickness direction of the array substrate.

    Abstract translation: 提供阵列基板,显示面板和制造薄膜晶体管(TFT)的方法。 阵列基板包括基底基板和形成在基底基板上的薄膜晶体管(TFT),TFT包括栅电极,栅极绝缘层,有源层,源/漏电极和层间绝缘层。 源极/漏极包括第一电极和第二电极,并且层间绝缘层位于第一电极和第二电极之间。 栅极电极,栅极绝缘层和有源层沿着与阵列基板的厚度方向垂直的方向依次排列,第一电极,层间绝缘层和第二电极在厚度方向依次配置 阵列基板。

    DISPLAY APPARATUS
    18.
    发明公开
    DISPLAY APPARATUS 审中-公开

    公开(公告)号:US20230397464A1

    公开(公告)日:2023-12-07

    申请号:US18448859

    申请日:2023-08-11

    CPC classification number: H10K59/131

    Abstract: The present disclosure provides a display apparatus, a display panel of which includes a panel chip; a second bonding region of a main circuit board is provided with second display terminals coupled with first display terminals and second touch control terminals coupled with first touch control terminals; each of segment touch control lines includes a first segment coupled between one second touch control terminal and one main connector in a first region, and a second segment coupled between a touch control chip and one main connector in a second region; a third region and a fourth region of a jumper connection circuit board are bonded with the first region and the second region respectively; the segment touch control lines are in one-to-one correspondence with jumper connection lines, each jumper connection line is coupled between one jumper connector in the third region and one jumper connector in the fourth region.

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