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公开(公告)号：US20230260453A1
公开(公告)日：2023-08-17
申请号：US18307416
申请日：2023-04-26
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Jiao ZHAO , Li XIAO , Minghua XUAN , Haoliang ZHENG , Dongni LIU , Jing LIU , Qi QI , Zhenyu ZHANG , Liang CHEN , Hao CHEN , Lijun YUAN
CPC classification number: G09G3/32 , G11C19/28 , H01L25/0753 , H01L27/0296 , H01L27/124 , H01L33/62 , G09G2300/026 , G09G2310/0286 , G09G2330/04
Abstract: An array substrate includes M pixel lines and N pixel circuit groups. The M pixel lines are disposed in a display area and arranged in a first direction. The N pixel circuit groups are arranged in the first direction. M is an integer greater than or equal to 2, and N is a positive integer less than M. A pixel circuit group of the N pixel circuit groups is electrically connected to adjacent two pixel lines of the M pixel lines, and the first direction is one of a row direction and a column direction.
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公开(公告)号：US20220277689A1
公开(公告)日：2022-09-01
申请号：US17744965
申请日：2022-05-16
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Jiao ZHAO , Li XIAO , Minghua XUAN , Haoliang ZHENG , Dongni LIU , Jing LIU , Qi QI , Zhenyu ZHANG , Liang CHEN , Hao CHEN , Lijun YUAN
Abstract: An array substrate includes pixel group(s) and pixel circuit group(s), each pixel group includes pixels, and each pixel includes sub-pixel(s). At least two pixel groups are arranged in a row direction; in a column direction, a length of a pixel group is greater than a length of a pixel circuit group electrically connected thereto; and orthographic projections of a sub-pixel and a pixel circuit group electrically connected to a pixel group to which the sub-pixel belongs on a plane does not overlap. Or, the at least two pixel groups are arranged in the column direction; in the row direction, a length of a pixel group is greater than a length of a pixel circuit group electrically connected thereto; and orthographic projections of a sub-pixel and a pixel circuit group electrically connected to a pixel group to which the sub-pixel belongs on another plane does not overlap.
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公开(公告)号：US20220246074A1
公开(公告)日：2022-08-04
申请号：US17475529
申请日：2021-09-15
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Minghua XUAN , Haoliang ZHENG , Liang CHEN , Qi QI , Jing LIU , Dongni LIU
IPC: G09G3/20 , H01L27/12 , H01L23/552 , H01L23/522
Abstract: The present disclosure provides a driving backplane, a display panel and a display device. The driving backplane comprises: a base substrate having a plurality of first conductive vias; a pixel circuit layer disposed on the base substrate and comprising a plurality of pixel circuits and a plurality of signal lines; a conductive portion, at least part of which is disposed in one first conductive via; a conductive pattern layer disposed on the base substrate and comprising a plurality of first conductive patterns; and a shielding layer disposed between the pixel circuit layer and the conductive pattern layer and having a plurality of hollow areas; wherein each of the plurality of signal lines is coupled to one first conductive pattern through at least one of the conductive portions.
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公开(公告)号：US20220208101A1
公开(公告)日：2022-06-30
申请号：US17488115
申请日：2021-09-28
Applicant: BOE Technology Group Co., Ltd.
IPC: G09G3/3266 , G09G3/3233 , G09G3/3258
Abstract: The present disclosure provides a display panel, a display device and a driving method. The display panel includes a display substrate and a driving chip. The display panel is configured to write a data signal to a corresponding pixel circuit at a pre-writing phase and a target data writing phase. The driving chip includes a voltage compensation module configured to obtain a compensation voltage value for the pixel circuits in each row in accordance with the quantity of pre-writing phases. Each pixel circuit is configured to write a pre-writing voltage stored in a parasitic capacitor to a gate electrode of a driving transistor in response to a pre-scanning signal at the pre-writing phase, and write a target writing voltage stored in the parasitic capacitor to the gate electrode of the driving transistor in response to a target scanning signal at the target data writing phase.
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公开(公告)号：US20220163700A1
公开(公告)日：2022-05-26
申请号：US17490913
申请日：2021-09-30
Applicant: BOE Technology Group Co., Ltd.
Inventor： Feng ZHANG , Kang GUO , Meili WANG , Renquan GU , Dongfei HOU , Libo WANG , Guangcai YUAN , Xue DONG , Wei WANG , Detian MENG , Jing YU , Jing LIU
IPC: G02B3/00
Abstract: The present disclosure provides a lens assembly and a fabricating method thereof, and a displaying device, and relates to the technical field of optics. The lens assembly includes a plurality of lenses that are not connected to each other and a plurality of isolating parts, the isolating parts are provided between neighboring instances of the lenses, and a refractive index of the isolating parts is different from a refractive index of the lenses.
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Patent Agency Ranking
16.发明申请公开(公告)号：US20210375700A1
公开(公告)日：2021-12-02
申请号：US17255079
申请日：2019-11-29
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Li XIAO , Jiao ZHAO , Minghua XUAN , Dongni LIU , Haoliang ZHENG , Zhenyu ZHANG , Liang CHEN , Hao CHEN , Jing LIU , Qi QI
Abstract: The present disclosure provides a method for detecting resistance of a side trace of a display substrate and the display substrate, and belongs to the field of display technology. In the method for detecting resistance of a side trace of a display substrate, the display substrate includes: a base substrate including a first surface and a second surface opposite to each other; a plurality of first pads at intervals on the first surface; and a plurality of second pads at intervals on the second surface; the first pad is electrically connected to a corresponding second pad through a side trace; the method includes forming at least one detection unit; wherein forming the detection unit includes: connecting two first pads through a connection part; and detecting two second pads in the detection unit, and obtaining resistance of the detection unit to obtain the resistance of the side trace.
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公开(公告)号：US20210210016A1
公开(公告)日：2021-07-08
申请号：US16069414
申请日：2017-11-15
Inventor： Zihua LI , Qi LIU , Guoping ZHANG , Jing LIU , Yuqing YANG , Xiping LI
IPC: G09G3/3258 , G09G3/3291 , G09G3/3266
Abstract: A pixel circuit, a display panel, a display device and a driving method are provided. The pixel circuit provides an initial signal having an excitation pulse to a control electrode of a driving transistor through a reset circuit in advance; and the initial signal having a preset voltage is provided to the control electrode of the driving transistor after a preset duration.
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公开(公告)号：US20210159208A1
公开(公告)日：2021-05-27
申请号：US16830834
申请日：2020-03-26
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Lili WANG , Haiwei SUN , Zhenxing TANG , Feng QU , Jing LIU , Chao LIU , Chuhang WANG , Qiangwei CUI , Ke MENG , Linhui GONG
Abstract: A chip bonding method and a bonding device. The chip bonding method is used for bonding a chip to a display module, the display module includes a substrate and a functional layer on the substrate, the substrate includes a first substrate portion and a second substrate portion, the functional layer is on the first substrate portion, and an electrode is on an upper side of the second substrate portion. The chip bonding method includes: forming a light absorbing film layer on a side of the second substrate portion facing away from the electrode; coating a conductive adhesive film on the electrode, and placing the chip on the conductive adhesive film; and irradiating, by using a laser beam, a side of the second substrate portion facing away from the electrode.
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公开(公告)号：US20190051235A1
公开(公告)日：2019-02-14
申请号：US15547236
申请日：2017-02-28
Inventor： Chang ZHANG , Kwanggyun JANG , Jing LIU , Zhiguang ZHANG , Hualing YANG
IPC: G09G3/3225 , H04N5/202 , H04N1/60
Abstract: The present disclosure provides a gamma tuning method and a gamma tuning device. The gamma tuning method includes steps of: comparing grayscale binding points of a to-be-debugged module with a standard gamma curve; determining a to-be-tuned grayscale binding point from the grayscale binding points of the to-be-debugged module in accordance with a comparison result between the grayscale binding points of the to-be-debugged module and the standard gamma curve; and tuning a grayscale brightness value of the to-be-tuned grayscale binding point in accordance with a target brightness value of the grayscale binding point on the standard gamma curve.
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公开(公告)号：US20240212633A1
公开(公告)日：2024-06-27
申请号：US17914336
申请日：2021-10-25
Inventor： Wenchao HAN , Wei SUN , Xinle WANG , Yifan SONG , Jing LIU , Xue DONG , Wanzhi CHEN
IPC: G09G3/34
CPC classification number: G09G3/3406 , G09G2320/041 , G09G2320/0626 , G09G2320/0693 , G09G2360/14
Abstract: The present disclosure provides a brightness adjusting method and system for a display apparatus, and belongs to the algorithm field. In the brightness adjusting method for a display apparatus provided by the present disclosure, the display apparatus includes a photosensitive sampling circuit, and the photosensitive sampling circuit includes at least one photosensitive device. The method includes: acquiring a current first sampling signal of each of the at least one photosensitive device; determining a second sampling signal of the photosensitive device according to an initial sampling signal acquired in advance and the first sampling signal; and calibrating the second sampling signal according to a preset calibration algorithm to obtain an actual sampling signal.
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