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公开(公告)号：US20230180551A1
公开(公告)日：2023-06-08
申请号：US17923934
申请日：2021-11-04
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Jiangnan LU , Libin LIU , Guangliang SHANG , Long HAN , Yu FENG , Li WANG , Mei LI
IPC: H10K59/131 , H10K59/12
CPC classification number: H10K59/131 , H10K59/1201 , H10K59/124
Abstract: A display panel includes: a substrate; at least one first signal line disposed on the substrate and located in a peripheral region; at least one second signal line disposed on the substrate and located in the peripheral region; an insulating layer covering the at least one first signal line and the at least one second signal line; and a shielding signal line covering the at least one groove. The at least one second signal line and the at least one first signal line are arranged in a same layer. A surface of the insulating layer away from the substrate has at least one groove. An orthogonal projection, on the substrate, of a bottom surface of a groove is located between orthogonal projections, on the substrate, of a first signal line and a second signal line.
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公开(公告)号：US20220328611A1
公开(公告)日：2022-10-13
申请号：US17435363
申请日：2021-03-15
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Jiangnan LU , Libin LIU , Jie ZHANG , Mei LI , Yuhan QIAN , Shiming SHI
Abstract: The display substrate includes: a substrate, an auxiliary cathode layer, a first insulating layer, an anode layer, a second insulating layer, and a cathode layer that are sequentially stacked on the substrate in a direction away from the substrate; the anode layer includes a plurality of anode patterns spaced apart from each other, and an anode spacing area is formed between adjacent anode patterns; an orthographic projection of the auxiliary cathode layer on the substrate and an orthographic projection of the cathode layer on the substrate have an auxiliary overlapping area, and the auxiliary cathode layer is electrically connected to the cathode layer through a connection via hole in the auxiliary overlapping area; an orthographic projection of the connection via hole on the substrate is located inside the orthographic projection of the anode spacing area on the substrate.
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公开(公告)号：US20210183967A1
公开(公告)日：2021-06-17
申请号：US17005701
申请日：2020-08-28
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Mei LI
Abstract: The present disclosure provides a photodiode, a display substrate, and manufacturing methods thereof, and a display device. The method for manufacturing the photodiode includes: forming a semiconductor material layer on a base substrate in a non-display region of a display substrate, the semiconductor material layer including a first contact area, a second contact area, and a semiconductor area sandwiched therebetween; processing the first contact area of the semiconductor material layer to form a first contact electrode; processing portions of the semiconductor material layer and the second contact area away from the base substrate in the semiconductor area, to form a first semiconductor layer and a second semiconductor layer stacked, the second semiconductor layer being located on a side of the first semiconductor layer away from the base substrate; and processing the second semiconductor layer in the second contact area to form a second contact electrode.
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公开(公告)号：US20250061835A1
公开(公告)日：2025-02-20
申请号：US18938202
申请日：2024-11-05
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Guangliang SHANG , Jie ZHANG , Jiangnan LU , Mei LI , Libin LIU
IPC: G09G3/20
Abstract: A gate driving unit includes a charge pump circuit and an output circuit; the charge pump circuit is connected to a first input node, an input clock signal terminal and a first node; the charge pump circuit is configured to control a voltage signal of the first input node under the control of an input clock signal provided by the input clock signal terminal, the voltage signal of the first input node is written into the first node when the voltage signal of the first input node is a first voltage signal; the output circuit comprises a first output transistor, a control electrode of the first output transistor is connected to the first node, a first electrode of the first output transistor is connected to an output voltage terminal, and a second electrode of the first output transistor is connected to a gate driving signal output terminal.
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公开(公告)号：US20240324384A1
公开(公告)日：2024-09-26
申请号：US18677617
申请日：2024-05-29
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Libin LIU , Mei LI , Shiming SHI , Li WANG
IPC: H10K59/35 , H10K50/80 , H10K59/12 , H10K59/122 , H10K59/131 , H10K71/00
CPC classification number: H10K59/353 , H10K50/80 , H10K59/122 , H10K59/131 , H10K59/352 , H10K71/00 , H10K59/1201
Abstract: The present disclosure provides a display substrate, a manufacturing method thereof, and a display device. The display substrate includes a display area and a non-display area located at a periphery of the display area, wherein the display area includes a plurality of pixel opening areas and a pixel spacing area located between the pixel opening areas; the display substrate further includes: a first electrode, wherein at least part of the first electrode is located in the pixel spacing area, an orthographic projection of the first electrode on a substrate of the display substrate does not overlap an orthographic projection of the pixel opening area on the substrate; and a second electrode electrically connected to the first electrode and located in the non-display area.
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Patent Agency Ranking
公开(公告)号：US20230154401A1
公开(公告)日：2023-05-18
申请号：US17621861
申请日：2021-01-19
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Mei LI , Tian DONG , Li WANG , Guangliang SHANG , Can ZHENG
IPC: G09G3/3233 , G09G3/3266 , G09G3/3275
CPC classification number: G09G3/3233 , G09G3/3266 , G09G3/3275 , G09G2300/0842 , G09G2320/0214
Abstract: A display panel and a display device are provided. The display panel includes: a pixel unit including a pixel circuit and a light-emitting element, the pixel circuit including a first transistor, the pixel unit including a first pixel unit and a second pixel unit located in a same row and adjacent columns; a first gate line and a second gate line, connected to gate electrodes of the first transistors of the first pixel unit and the second pixel unit; a first gate signal line, connected to the first pixel unit; a second gate signal line, connected to the second pixel unit; a first connection line connected with the first gate signal line through the first connection line; and a second connection line connected with the second gate signal line through the second connection line.
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公开(公告)号：US20220383811A1
公开(公告)日：2022-12-01
申请号：US16958480
申请日：2019-07-31
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Libin LIU , Mei LI , Hongli WANG
IPC: G09G3/3233 , H01L27/32
Abstract: A display substrate, a preparation method thereof, a display panel, and a display device are provided. The display substrate includes a base substrate and a repeating unit, the repeating unit includes a plurality of sub-pixels including a first sub-pixel and a second sub-pixel, a color of light emitted by a light-emitting element of the first sub-pixel is identical to a color of light emitted by a light-emitting element of the second sub-pixel, a shape of a first light-emitting voltage application electrode of the light-emitting element of the first sub-pixel is different from a shape of a first light-emitting voltage application electrode of the light-emitting element of the second sub-pixel.
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公开(公告)号：US20220020827A1
公开(公告)日：2022-01-20
申请号：US17310325
申请日：2021-03-15
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Libin LIU , Mei LI , Shiming SHI , Li WANG
Abstract: The present disclosure provides a display substrate, a manufacturing method thereof, and a display device. The display substrate includes a display area and a non-display area located at a periphery of the display area, wherein the display area includes a plurality of pixel opening areas and a pixel spacing area located between the pixel opening areas; the display substrate further includes: a first electrode, wherein at least part of the first electrode is located in the pixel spacing area, an orthographic projection of the first electrode on a substrate of the display substrate does not overlap an orthographic projection of the pixel opening area on the substrate; and a second electrode electrically connected to the first electrode and located in the non-display area.
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公开(公告)号：US20210408081A1
公开(公告)日：2021-12-30
申请号：US16605588
申请日：2019-04-08
Inventor： Peng LIU , Fuqiang LI , Jun FAN , Bailing LIU , Jianjun ZHANG , Yusheng LIU , Mei LI
IPC: H01L27/12 , H01L29/786 , H01L29/66 , G06F3/041
Abstract: An array substrate, a method of manufacturing an array substrate, a display panel, and an electronic device are provided. The array substrate includes a display area and a peripheral area; the display area includes a pixel region, the pixel region includes a first thin film transistor, and the first thin film transistor includes a first active layer; the peripheral area includes a second thin film transistor, and the second thin film transistor includes a second active layer; and the first active layer includes a material of oxide semiconductor, and the second active layer includes a material of poly-silicon semiconductor.
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公开(公告)号：US20240423046A1
公开(公告)日：2024-12-19
申请号：US18818535
申请日：2024-08-28
Applicant: BOE Technology Group Co., Ltd.
Inventor： Jiangnan LU , Guangliang SHANG , Can ZHENG , Yu FENG , Libin LIU , Jie ZHANG , Mei LI
IPC: H10K59/131 , G09G3/3208 , H10K59/121
Abstract: Provided is a display substrate, the display substrate is provided with a display area and a peripheral area around the display area, and includes a source/drain layer and an anode layer, wherein in the peripheral area, the source/drain layer includes pairs of first signal lines configured to drive circuits, and the pairs of first signal lines include clock signal lines and gate drive lines; and the anode layer includes a common power line provided with vent holes; and overlapping areas between two first signal lines in any pair of the first signal lines and a projection pattern of the vent hole are equal, the projection pattern of the vent hole being a pattern of an orthographic projection of the vent hole in the common power line onto the source/drain layer. A display panel and a display device are also provided.
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