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    SYSTEM AND METHOD TO CONTROL LATENCY OF SERIALLY-REPLICATED MULTI-DESTINATION FLOWS
    11.
    发明申请
    SYSTEM AND METHOD TO CONTROL LATENCY OF SERIALLY-REPLICATED MULTI-DESTINATION FLOWS 审中-公开

    公开(公告)号：US20200313921A1

    公开(公告)日：2020-10-01

    申请号：US16901260

    申请日：2020-06-15

    Applicant: Cisco Technology, Inc.

    Inventor： Dennis Khoa Dang Nguyen ,  Chih-Tsung Huang

    IPC: H04L12/18 ,  H04L12/801 ,  H04L12/879 ,  H04L12/841 ,  H04L12/803 ,  H04L12/931

    Abstract: Exemplified systems and methods facilitate multicasting latency optimization operations for router, switches, and other network devices, for routed Layer-3 multicast packets to provide even distribution latency and/or selective prioritized distribution of latency among multicast destinations. A list of network destinations for serially-replicated packets is traversed in different sequences from one packet to the next, to provide delay fairness among the listed destinations. The list of network destinations are mapped to physical network ports, virtual ports, or logical ports of the router, switches, or other network devices and, thus, the different sequences are also traversed from these physical network ports, virtual ports, or logical ports. The exemplified systems and methods facilitates the management of traffic that is particularly beneficial in in a data center.

    SYSTEM AND METHOD TO CONTROL LATENCY OF SERIALLY-REPLICATED MULTI-DESTINATION FLOWS
    12.
    发明申请
    SYSTEM AND METHOD TO CONTROL LATENCY OF SERIALLY-REPLICATED MULTI-DESTINATION FLOWS 审中-公开

    公开(公告)号：US20190245710A1

    公开(公告)日：2019-08-08

    申请号：US16286031

    申请日：2019-02-26

    Applicant: Cisco Technology, Inc.

    Inventor： Dennis Khoa Dang Nguyen ,  Chih-Tsung Huang

    IPC: H04L12/18 ,  H04L12/931 ,  H04L12/803 ,  H04L12/879 ,  H04L12/801 ,  H04L12/841

    Abstract: Exemplified systems and methods facilitate multicasting latency optimization operations for router, switches, and other network devices, for routed Layer-3 multicast packets to provide even distribution latency and/or selective prioritized distribution of latency among multicast destinations. A list of network destinations for serially-replicated packets is traversed in different sequences from one packet to the next, to provide delay fairness among the listed destinations. The list of network destinations are mapped to physical network ports, virtual ports, or logical ports of the router, switches, or other network devices and, thus, the different sequences are also traversed from these physical network ports, virtual ports, or logical ports. The exemplified systems and methods facilitates the management of traffic that is particularly beneficial in a data center.

    System and method to control latency of serially-replicated multi-destination flows
    13.
    发明授权
    System and method to control latency of serially-replicated multi-destination flows 有权

    公开(公告)号：US10218525B2

    公开(公告)日：2019-02-26

    申请号：US15349629

    申请日：2016-11-11

    Applicant: Cisco Technology, Inc.

    Inventor： Dennis Khoa Dang Nguyen ,  Chih-Tsung Huang

    IPC: H04L12/18 ,  H04L12/801 ,  H04L12/879 ,  H04L12/841 ,  H04L12/803 ,  H04L12/931

    Abstract: Exemplified systems and methods facilitate multicasting latency optimization operations for router, switches, and other network devices, for routed Layer-3 multicast packets to provide even distribution latency and/or selective prioritized distribution of latency among multicast destinations. A list of network destinations for serially-replicated packets is traversed in different sequences from one packet to the next, to provide delay fairness among the listed destinations. The list of network destinations are mapped to physical network ports, virtual ports, or logical ports of the router, switches, or other network devices and, thus, the different sequences are also traversed from these physical network ports, virtual ports, or logical ports. The exemplified systems and methods facilitates the management of traffic that is particularly beneficial in in a data center.

    DETERMINISTIC CALIBRATED SYNCHRONIZED NETWORK INTERLINK ACCESS
    14.
    发明申请
    DETERMINISTIC CALIBRATED SYNCHRONIZED NETWORK INTERLINK ACCESS 审中-公开

    公开(公告)号：US20180013541A1

    公开(公告)日：2018-01-11

    申请号：US15204937

    申请日：2016-07-07

    Applicant: Cisco Technology, Inc.

    Inventor： Chih-Tsung Huang ,  Wei-Jen Huang ,  Kelvin Chan ,  Keerthi Manjunathan Swarnamanjunathan

    IPC: H04L7/00 ,  H04L12/26

    Abstract: Technologies for calibrated network interlink access. In some embodiments, a system can calculate a first communication latency of a first link between a first processing element in a first switch and a second processing element in a second switch, and a second communication latency associated with a second link between the first processing element and a third processing element in a third switch. The system can determine a delta between the first communication latency and the second communication latency, and whether respective clock rates of the first switch, second switch, and third switch have a clock rate variation, to yield a clock rate variation determination. Based on the delta and clock rate variation determination, the system can determine an offset value for synchronizing the first communication latency and second communication latency. Based on the offset value, the system can calibrate traffic over the first link and/or the second link.

    EXPORTING REAL TIME NETWORK TRAFFIC LATENCY AND BUFFER OCCUPANCY
    16.
    发明申请
    EXPORTING REAL TIME NETWORK TRAFFIC LATENCY AND BUFFER OCCUPANCY 审中-公开
    实时实时网络传输延迟和缓冲区占用

    公开(公告)号：US20170026256A1

    公开(公告)日：2017-01-26

    申请号：US15285603

    申请日：2016-10-05

    Applicant: Cisco Technology, Inc.

    Inventor： Thomas J. Edsall ,  Yue J. Yang ,  Wei-Jen Huang ,  Chih-Tsung Huang

    IPC: H04L12/26

    CPC classification number: H04L43/045 ,  H04L43/08 ,  H04L43/0882 ,  H04L43/10 ,  H04L47/24 ,  H04L47/30

    Abstract: Techniques are presented herein to facilitate the monitoring of occupancy of a buffer in a network device. Packets are received at a network device. Information is captured describing occupancy of the buffer caused by packet flow through the buffer in the network device. Analytics packets are generated containing the information. The analytics packets from the network device for retrieval of the information contained therein for analysis, replay of buffer occupancy, etc.

    Abstract translation: 这里呈现技术以便于监视网络设备中的缓冲器的占用。 数据包在网络设备上被接收。 捕获的信息描述了通过网络设备中的缓冲器的分组流引起的缓冲区的占用。 生成包含该信息的分析数据包。 来自网络设备的用于检索其中所包含的信息的分析分组用于分析，重放缓冲器占用等

    System and method for tracking packets in a network environment
    17.
    发明授权
    System and method for tracking packets in a network environment 有权
    用于在网络环境中跟踪数据包的系统和方法

    公开(公告)号：US09450846B1

    公开(公告)日：2016-09-20

    申请号：US13653814

    申请日：2012-10-17

    Applicant: CISCO TECHNOLOGY, INC.

    Inventor： Wei-Jen Huang ,  Chih-Tsung Huang

    IPC: H04L12/26 ,  H04J3/06

    CPC classification number: H04L43/0858 ,  H04J3/0667 ,  H04J3/0682 ,  H04J3/0697 ,  H04L43/0864 ,  H04L43/10 ,  H04L43/106 ,  H04L43/12

    Abstract: A method is provided in one example embodiment that includes transmitting a message from a first port to a second port, recording a timestamp of the message at each clock between the first port and the second port, and transmitting a first follow-up message from a first port to a second port to collect timestamps at each clock between the first port and the second port. The method further includes transmitting a loopback message from the second port to the first port, recording timestamps of the loopback message at each clock between the second port and the first port, and transmitting a second follow-up message from the second port to the first port to collect and append the timestamps of the loopback message at each clock.

    Abstract translation: 在一个示例实施例中提供了一种方法，其包括将消息从第一端口传送到第二端口，在第一端口和第二端口之间的每个时钟处记录消息的时间戳，以及从第一端口和第二端口发送第一后续消息 第一端口到第二端口，以在第一端口和第二端口之间的每个时钟收集时间戳。 该方法还包括从第二端口向第一端口发送环回消息，在第二端口和第一端口之间的每个时钟记录环回消息的时间戳，以及从第二端口向第一端口发送第二后续消息 端口在每个时钟收集和追加回送消息的时间戳。

    Parallel processing for low latency network address translation
    19.
    发明授权
    Parallel processing for low latency network address translation 有权
    并行处理低延迟网络地址转换

    公开(公告)号：US09154415B1

    公开(公告)日：2015-10-06

    申请号：US13755438

    申请日：2013-01-31

    Applicant: Cisco Technology, Inc.

    Inventor： Alessandro Fulli ,  Putu Harry Subagio ,  Chih-Tsung Huang

    IPC: H04L12/741 ,  H04L29/06

    CPC classification number: H04L45/745 ,  H04L29/0653 ,  H04L45/121 ,  H04L45/74 ,  H04L61/2521 ,  H04L69/161 ,  H04L69/22

    Abstract: A packet is received at an ingress port of a networking device and a forwarding result that identifies an egress port for the packet is generated. In parallel with the generation of the forwarding result, a network address translation (NAT) result that identifies one or more NAT rules for possible application to the packet is generated. The forwarding result and the NAT result are then used to generate a routing decision result.

    Abstract translation: 在网络设备的入口处接收到分组，并且生成标识分组的出口端口的转发结果。 与转发结果的产生并行，生成识别用于可能应用于分组的一个或多个NAT规则的网络地址转换（NAT）结果。 然后将转发结果和NAT结果用于生成路由决策结果。

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