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29 条记录 (耗时 0.018 秒)

    Charging of a bootstrap capacitance through an LDMOS
    12.
    发明授权
    Charging of a bootstrap capacitance through an LDMOS 失效
    通过LDMOS充电自举电容

    公开(公告)号：US5883547A

    公开(公告)日：1999-03-16

    申请号：US644449

    申请日：1996-05-13

    申请人： Claudio Diazzi ,  Fabrizio Martignoni ,  Mario Tarantola

    发明人： Claudio Diazzi ,  Fabrizio Martignoni ,  Mario Tarantola

    IPC分类号： G01R19/165 ,  H01L21/8234 ,  H01L27/088 ,  H02J1/00 ,  H03K17/06 ,  H03K17/0814 ,  H02M7/162

    CPC分类号： H03K17/08142 ,  H03K17/063

    摘要： A charging circuit for a bootstrap capacitance employing an integrated LDMOS transistor and including a circuital device for preventing the turning on a parasitic transistors of the integrated LDMOS structure during transients that comprises a plurality of directly biased junctions (D1, D2, . . . , Dn) connected in series between a source and a body of the LDMOS transistor structure and at least a current generator, tied to ground potential, coupled between said body and ground, has at least one switch (INT1) between said source and a first junction (D1) of said plurality of junctions and a limiting resistance (R) connected between the body and the current generator (GEN). The switch (INT1) is kept open during a charging phase of the bootstrap capacitance (Cboot) and is closed when the charge voltage (Vboot) of the bootstrap capacitance reaches a preset threshold. Moreover, the body voltage (VB) is prevented from exceeding the source voltage (VS) plus a Vbe, by controlling a discharge path (T2) with a control stage (T1, R1) in response to a drop of the voltage on the limiting resistance (R). This body voltage control circuit is enabled by a second switch (INT2) driven in phase with the first switch (INT1).

    摘要翻译： 一种用于使用集成LDMOS晶体管的自举电容的充电电路，并且包括用于在包括多个直接偏置的结（D1，D2，...，Dn）的瞬变期间阻止集成LDMOS结构的寄生晶体管的导通的电路装置 ）串联连接在LDMOS晶体管结构的源极和主体之间，并且至少连接在所述主体和地之间的接地电位的电流发生器在所述源和第一结之间具有至少一个开关（INT1） D1）和连接在主体和电流发生器（GEN）之间的限制电阻（R）。 开关（INT1）在自举电容（Cboot）的充电阶段保持打开，当自举电容的充电电压（Vboot）达到预设阈值时，开关闭合。 此外，通过响应于限制电压的下降控制具有控制级（T1，R1）的放电路径（T2），防止体电压（VB）超过源极电压（VS）加上Vbe 电阻（R）。 该体电压控制电路由与第一开关（INT1）同相驱动的第二开关（INT2）使能。

    Inductance and capacitance charge pump circuit for driving power MOS transistor bridges
    13.
    再颁专利
    Inductance and capacitance charge pump circuit for driving power MOS transistor bridges 失效
    用于驱动功率MOS晶体管桥的电感和电容电荷泵电路

    公开(公告)号：USRE35041E

    公开(公告)日：1995-09-26

    申请号：US990630

    申请日：1992-12-14

    申请人： Domenico Rossi ,  Claudio Diazzi

    发明人： Domenico Rossi ,  Claudio Diazzi

    IPC分类号： H02M3/07 ,  H02M3/155 ,  H02M3/156 ,  H02M7/538 ,  H03K17/06 ,  H03K17/082 ,  H03K17/60 ,  H03K3/01 ,  H03L5/00

    CPC分类号： H03K17/0826 ,  H02M3/156 ,  H02M7/538 ,  H03K17/063

    摘要： The circuit comprises a tank capacitance and a charge circuit supplied with the same voltage as the bridge and comprising an inductance and a control transistor. There is also provided a control circuit, which comprises an oscillator controlling the periodic switching of control transistor and a comparator which controls the momentary clamping of control transistor in the condition wherein the charge circuit is interrupted when the difference between the voltage across capacitance and the power supply voltage exceeds a present maximum value and the unclamping of the same transistor when such difference falls below a preset minimum value. A further comparator similarly clamps control transistor if there is an excess current in the transistor itself.

    摘要翻译： 该电路包括一个槽电容和一个充电电路，该电荷被提供与电桥相同的电压，并包括一个电感和一个控制晶体管。 还提供了一种控制电路，其包括控制控制晶体管的周期性切换的振荡器和控制晶体管的瞬时钳位的比较器，其中当电容和功率之间的电压差异时，充电电路被中断 电源电压超过当前的最大值，并且当这种差异下降到预设的最小值以下时，同一晶体管的松开。 如果在晶体管本身中存在过量的电流，则另外的比较器也类似地钳位控制晶体管。

    Protection of power converters from voltage spikes
    14.
    发明授权
    Protection of power converters from voltage spikes 失效
    电源转换器保护电压尖峰

    公开(公告)号：US4958121A

    公开(公告)日：1990-09-18

    申请号：US444553

    申请日：1989-11-30

    申请人： Andrea Cuomo ,  Claudio Diazzi ,  Klaus Rischmuller

    发明人： Andrea Cuomo ,  Claudio Diazzi ,  Klaus Rischmuller

    IPC分类号： H02M3/155 ,  H02M3/158 ,  H03K17/0814

    CPC分类号： H03K17/08142 ,  H02M3/1582

    摘要： In a power converter circuit directly or indirectly connected to the power distribution network, the protection from voltage spikes which may occur on the power supply rail is implemented in a manner as to consent the utilization of at least a portion of the energy associated with the spike by storing portion of said energy in the reactive components of the converter circuit itself instead of dissipating completely the energy through a dissipating elements as in prior art arrangements. The novel circuit arrangement utilizes one or two spike sensors the output signal or signals of which are fed to logic gates which determine a certain configuration of the analog switches of the converter circuit. A protection voltage limiting element (zener diode, avalanche diode, voltage-dependent resistor, etc.) is functionally connected across the analog switch connected between the reactive element of the converter circuit and the power supply rail and limits to its intrinsic breakdown voltage the maximum voltage across the switch.

    High-efficiency driver circuit for capacitive loads
    15.
    发明授权
    High-efficiency driver circuit for capacitive loads 有权
    用于容性负载的高效驱动电路

    公开(公告)号：US06828712B2

    公开(公告)日：2004-12-07

    申请号：US10150548

    申请日：2002-05-17

    申请人： Luca Battaglin ,  Pietro Gallina ,  Giancarlo Saba ,  Giancarlo Zinco ,  Claudio Diazzi ,  Vittorio Peduto

    发明人： Luca Battaglin ,  Pietro Gallina ,  Giancarlo Saba ,  Giancarlo Zinco ,  Claudio Diazzi ,  Vittorio Peduto

    IPC分类号： H01L4108

    CPC分类号： H03K17/162 ,  H01L41/042 ,  H03K4/94 ,  H03K2217/0036

    摘要： A circuit for driving capacitive loads in a highly efficient manner. In one embodiment, a drive portion is connected to at least one end of a capacitive electric load being applied a voltage waveform. The embodiment further comprises a switching circuit portion having its output connected to the above one end of the capacitive load in order to supply a fraction of the overall current demanded by the load. Additionally, a switching circuit and accompanying switching method provide for efficiently supplying peak current to the capacitive load during voltage fluctuation in the voltage waveform. Briefly, the invention is a circuit arrangement aimed at providing a highly efficient drive for the capacitive load, using a combined linear/switching setup and without distorting the quality of the waveform generated across the capacitive load.

    摘要翻译： 用于以高效的方式驱动电容性负载的电路。 在一个实施例中，驱动部分连接到施加电压波形的电容性电负载的至少一端。 该实施例还包括开关电路部分，其输出连接到电容性负载的上述一端，以便提供负载所需的总电流的一部分。 此外，开关电路和伴随的开关方法提供在电压波形的电压波动期间有效地向电容性负载提供峰值电流。 简而言之，本发明是一种电路装置，其目的在于提供使用组合线性/开关设置的电容性负载的高效率驱动，并且不会使电容性负载上产生的波形的质量失真。

    Voltage boosting circuit with load current sensing
    17.
    发明授权
    Voltage boosting circuit with load current sensing 失效
    带负载电流检测的升压电路

    公开(公告)号：US5508602A

    公开(公告)日：1996-04-16

    申请号：US128791

    申请日：1993-09-28

    申请人： Pierandrea Borgato ,  Claudio Diazzi ,  Albino Pidutti

    发明人： Pierandrea Borgato ,  Claudio Diazzi ,  Albino Pidutti

    IPC分类号： H02J1/00 ,  H02M3/155 ,  H02M3/156 ,  H02M7/12 ,  H02M7/217 ,  G05F1/625

    CPC分类号： H02M3/156

    摘要： A power supply in which control of the switch-on instant of a power device of a boost-circuit (operating in a discontinuous mode) is implemented by monitoring the current which actually flows through the "fly-back" inductance. The current is monitored on a sensing resistance, and, by the use of a comparator, a signal is produced for enabling/disabling the transfer to an input of a PWM driving circuit of a switch-on signal produced by a null detector. This configuration provide good noise immunity, which is particularly useful in power-factor-correction applications, and reduced power dissipation.

    摘要翻译： 通过监视实际上流过“回飞”电感的电流来实现对升压电路的功率器件的接通瞬间（以不连续模式操作）的控制的电源。 在感测电阻上监视电流，并且通过使用比较器，产生用于使能/禁止向由空检测器产生的接通信号的PWM驱动电路的输入的传输的信号。 这种配置提供了良好的抗噪声能力，这在功率因数校正应用中特别有用，并降低了功耗。

    Control circuit with a level shifter for switching an electronic switch
    20.
    发明授权
    Control circuit with a level shifter for switching an electronic switch 失效
    具有用于切换电子开关的电平转换器的控制电路

    公开(公告)号：US5572156A

    公开(公告)日：1996-11-05

    申请号：US529883

    申请日：1995-09-18

    申请人： Claudio Diazzi ,  Fabrizio Martignoni ,  Mario Tarantola

    发明人： Claudio Diazzi ,  Fabrizio Martignoni ,  Mario Tarantola

    IPC分类号： H02P7/29 ,  H03K3/356 ,  H03K17/06 ,  H03K17/16 ,  H03K17/687 ,  H03K3/00

    CPC分类号： H03K3/356113 ,  H03K17/063 ,  H03K17/161 ,  H03K17/687

    摘要： A control circuit for a power transistor, connected between two supply terminals in series with a load. The control circuit comprises a control logic circuit which produces a signal at two levels with respect to a reference terminal, a level shifter connected between the control circuit and the power transistor, which produces a signal at two levels relative to the node between the power transistor and the load. The level shifter comprises a flip-flop the output of which controls the power transistor, and an electronic switch, for example a MOSFET transistor, connected between the "set" input of the flip-flop and the node and controlled by the "reset" input of the flip-flop in such a way as to be closed when the "reset" input is greater, by a predetermined value, than that of the node. The electronic switch prevents the parasitic current flowing through the set and reset inputs from erroneously switching the power transistor.

    摘要翻译： 用于功率晶体管的控制电路，连接在与负载串联的两个电源端子之间。 该控制电路包括控制逻辑电路，该控制逻辑电路相对于参考端产生两个电平的信号，连接在控制电路和功率晶体管之间的电平转换器，其产生相对于功率晶体管 和负载。 电平移位器包括其输出端控制功率晶体管的触发器和连接在触发器的“设置”输入和节点之间并由“复位”控制的电子开关，例如MOSFET晶体管， 触发器的输入以当“复位”输入比节点的输入大一预定值时被关闭。 电子开关防止流过设定和复位输入的寄生电流错误地切换功率晶体管。