公开(公告)号：US20070283428A1

公开(公告)日：2007-12-06

申请号：US11471000

申请日：2006-09-07

申请人： Abraham C. Ma ,  Charles C. Lee ,  I-Kang Yu ,  Edward W. Lee ,  Ming-Shiang Shen

发明人： Abraham C. Ma ,  Charles C. Lee ,  I-Kang Yu ,  Edward W. Lee ,  Ming-Shiang Shen

IPC分类号： H04L9/32

CPC分类号： G06F11/1068 ,  G06F11/1076 ,  G06F12/1416 ,  G06F21/32 ,  G06F21/78 ,  G06K9/00087 ,  G06K19/07 ,  G06K19/07354 ,  G07C9/00087 ,  H03M13/153 ,  H03M13/1535 ,  H03M13/1545 ,  H03M13/6561

摘要： An electronic data flash card accessible by a host computer, includes a flash memory controller connected to a flash memory device, and an input-output interface circuit activated to establish a communication with the host. In an embodiment, the flash card uses a USB interface circuit for communication with the host. A flash memory controller includes an arbitrator for mapping logical addresses with physical block addresses, and for performing block management operations including: storing reassigned data to available blocks, relocating valid data in obsolete blocks to said available blocks and reassigning logical block addresses to physical block addresses of said available blocks, finding bad blocks of the flash memory device and replacing with reserve blocks, erasing obsolete blocks for recycling after relocating valid data to available blocks, and erase count wear leveling of blocks, etc. Furthermore, each flash memory device includes an internal buffer for accelerating the block management operations.

摘要翻译： 由主机可访问的电子数据闪存卡包括连接到闪速存储器件的闪存控制器和被激活以建立与主机的通信的输入 - 输出接口电路。 在一个实施例中，闪存卡使用USB接口电路与主机进行通信。 闪速存储器控制器包括用于将逻辑地址与物理块地址对准的仲裁器，并且用于执行块管理操作，包括：将重新分配的数据存储到可用块，将过时块中的有效数据重定位到所述可用块并将逻辑块地址重新分配给物理块地址 的所述可用块，找到闪存设备的坏块并用备用块替换，在将有效数据重新定位到可用块之后擦除用于再循环的废弃块，以及擦除块的计数损耗均衡等。此外，每个闪存设备包括 内部缓冲区，用于加快块管理操作。

公开(公告)号：US07788553B2

公开(公告)日：2010-08-31

申请号：US11871117

申请日：2007-10-11

申请人： David Q. Chow ,  Abraham C. Ma ,  Edward W. Lee ,  Ming-Shiang Shen

发明人： David Q. Chow ,  Abraham C. Ma ,  Edward W. Lee ,  Ming-Shiang Shen

IPC分类号： G11C29/00 ,  G01R31/28 ,  G11C16/04

CPC分类号： G06F11/2221

摘要： A high volume testing/formatting process is provided for Universal Serial Bus-based (USB-based) electronic data flash cards (USB devices) that meets the increasing demand for USB electronic data flash cards (USB devices). A test host is simultaneously coupled to the multiple USB devices (e.g., using a multi-port card reader or a probe fixture), a controller endpoint value is read from each of the USB devices and verified with a known good value, and then testing/formatting is performed on each of the USB devices by writing predetermined data into each USB device in a pipelined manner, then reading out and testing the predetermined data. In one embodiment, the test host implements a special USB driver that blocks standard USB registration procedures upon detecting the plurality of USB devices. Control and/or boot code data are written onto the flash memory device (i.e., instead of being provided on a controller ROM).

摘要翻译： 为通用串行总线（USB）电子数据闪存卡（USB设备）提供了大容量测试/格式化过程，可满足USB电子数据闪存卡（USB设备）日益增长的需求。 测试主机同时耦合到多个USB设备（例如，使用多端口读卡器或探头夹具），从每个USB设备读取控制器端点值，并用已知的良好值进行验证，然后测试 通过以流水线方式将预定数据写入每个USB设备，然后读出并测试预定数据，在每个USB设备上执行/格式化。 在一个实施例中，测试主机在检测到多个USB设备时实现阻止标准USB注册过程的特殊USB驱动器。 控制和/或引导代码数据被写入快闪存储器件（即，不是设置在控制器ROM上）。

公开(公告)号：US20080177922A1

公开(公告)日：2008-07-24

申请号：US11871117

申请日：2007-10-11

申请人： David Q. Chow ,  Abraham C. Ma ,  Edward W. Lee ,  Ming-Shiang Shen

发明人： David Q. Chow ,  Abraham C. Ma ,  Edward W. Lee ,  Ming-Shiang Shen

IPC分类号： G06F13/00 ,  G06F12/00

CPC分类号： G06F11/2221

摘要： A high volume testing/formatting process is provided for Universal Serial Bus-based (USB-based) electronic data flash cards (USB devices) that meets the increasing demand for USB electronic data flash cards (USB devices). A test host is simultaneously coupled to the multiple USB devices (e.g., using a multi-port card reader or a probe fixture), a controller endpoint value is read from each of the USB devices and verified with a known good value, and then testing/formatting is performed on each of the USB devices by writing predetermined data into each USB device in a pipelined manner, then reading out and testing the predetermined data. In one embodiment, the test host implements a special USB driver that blocks standard USB registration procedures upon detecting the plurality of USB devices. Control and/or boot code data are written onto the flash memory device (i.e., instead of being provided on a controller ROM).

摘要翻译： 为通用串行总线（USB）电子数据闪存卡（USB设备）提供了大容量测试/格式化过程，可满足USB电子数据闪存卡（USB设备）日益增长的需求。 测试主机同时耦合到多个USB设备（例如，使用多端口读卡器或探头夹具），从每个USB设备读取控制器端点值，并用已知的良好值进行验证，然后测试 通过以流水线方式将预定数据写入每个USB设备，然后读出并测试预定数据，在每个USB设备上执行/格式化。 在一个实施例中，测试主机在检测到多个USB设备时实现阻止标准USB注册过程的特殊USB驱动器。 控制和/或引导代码数据被写入快闪存储器件（即，不是设置在控制器ROM上）。

公开(公告)号：US07099539B1

公开(公告)日：2006-08-29

申请号：US10615318

申请日：2003-07-07

申请人： Chi Au ,  Tzu-Yih Chu ,  Hao Yin ,  Abraham C. Ma ,  Edward W. Lee

发明人： Chi Au ,  Tzu-Yih Chu ,  Hao Yin ,  Abraham C. Ma ,  Edward W. Lee

IPC分类号： G02B6/26

CPC分类号： G02B6/2746 ,  G02B6/125 ,  G02B6/266

摘要： An optical system and associated method are provided. Included is a first branch capable of allowing light to pass therethrough in a forward direction and a reverse direction. The first branch includes a first medium with a first refractive index (n1), and a first end and a second end. Also included is a second branch capable of allowing light to pass therethrough in the forward direction. The second branch includes a second medium with a second refractive index (n2, with n2

摘要翻译： 提供了一种光学系统及相关方法。 包括能够使光从正向和反方向通过的第一分支。 第一分支包括具有第一折射率（n <1> 1）的第一介质，以及第一端和第二端。 还包括能够允许光沿正向通过的第二分支。 第二分支包括第二介质，其具有第二折射率（n _{2，n≥2 <= SIN＆lt; 1＆gt;（n2 / n＆lt; 1＆gt; 通过第一分支的光通过第二分支，其中θ1是从第一分支到第二分支的反向通过的光的入射角。}

公开(公告)号：US07428605B2

公开(公告)日：2008-09-23

申请号：US11309842

申请日：2006-10-11

申请人： Jim Chin-Nan Ni ,  Abraham C. Ma ,  Edward W. Lee ,  Ming-Shiang Shen

发明人： Jim Chin-Nan Ni ,  Abraham C. Ma ,  Edward W. Lee ,  Ming-Shiang Shen

IPC分类号： G06F13/12 ,  H01R29/00

CPC分类号： H01R13/6658 ,  G06F12/1416 ,  G06F21/32 ,  G06F21/78 ,  G06K9/00087 ,  G06K19/07 ,  G06K19/07354 ,  G07C9/00087 ,  H01R13/7175 ,  H05K5/0278

摘要： A Universal-Serial-Bus (USB) device has a USB plug that is centered over a center-line of a circuit board. The circuit board with flash memory and a USB flash controller has metal pads that a USB connector is soldered to. The USB connector has a rear step that is about half the height of the USB connector plug. Contacts on the rear step are soldered to the metal pads on the circuit board so that the USB connector is centered around the edge of the circuit board. The overall height of the flash device can be reduced since the bulky USB connector is not attached off-center to the circuit board, but is attached at the half-height rear step. Both the USB connector and the circuit board share the same center line, allowing a printed-circuit board assembly (PCBA) to be symmetric around the center line.

摘要翻译： 通用串行总线（USB）设备具有以电路板中心线为中心的USB插头。 具有闪存的电路板和USB闪存控制器具有焊接USB连接器的金属焊盘。 USB连接器的后部步骤大约是USB连接器插头高度的一半。 后台上的触点焊接到电路板上的金属焊盘，使得USB连接器围绕电路板的边缘居中。 由于笨重的USB连接器不会偏离电路板的中心位置，而是在半高后方的步骤安装，因此闪光装置的整体高度可以减小。 USB连接器和电路板共享相同的中心线，允许印刷电路板组件（PCBA）围绕中心线对称。

公开(公告)号：US07676640B2

公开(公告)日：2010-03-09

申请号：US11864652

申请日：2007-09-28

申请人： David Q. Chow ,  Charles C. Lee ,  Frank I-Kang Yu ,  Edward W. Lee ,  Ming-Shiang Shen

发明人： David Q. Chow ,  Charles C. Lee ,  Frank I-Kang Yu ,  Edward W. Lee ,  Ming-Shiang Shen

IPC分类号： G06F13/10

CPC分类号： G06F8/654

摘要： An electronic data flash card is accessible by a host system, and includes a flash memory controller and at least one flash memory device coupled to the flash controller. The boot code and control code for the flash memory system (flash card) are stored in the flash memory device during a programming procedure. The flash controller transfers the boot code and control code to a volatile main memory (e.g., random access memory or RAM) at start up or reset making a RAM-based memory system. Boot code and control code are selectively overwritten during a code updating operation. A single flash controller thus supports multiple brands and types of flash memory to eliminate stocking issues.

摘要翻译： 电子数据闪存卡可由主机系统访问，并且包括闪存控制器和耦合到闪存控制器的至少一个闪存设备。 闪存系统（闪存卡）的启动代码和控制代码在编程过程中存储在闪存设备中。 闪存控制器在启动或复位时将引导代码和控制代码传送到易失性主存储器（例如，随机存取存储器或RAM），从而形成基于RAM的存储器系统。 引导代码和控制代码在代码更新操作期间被有选择地覆盖。 因此，单个闪存控制器支持多种品牌和类型的闪存，以消除存货问题。

公开(公告)号：US07814337B2

公开(公告)日：2010-10-12

申请号：US11623863

申请日：2007-01-17

申请人： Charles C. Lee ,  I-Kang Yu ,  Edward W. Lee ,  Ming-Shiang Shen

发明人： Charles C. Lee ,  I-Kang Yu ,  Edward W. Lee ,  Ming-Shiang Shen

IPC分类号： H04L9/00

CPC分类号： G06F21/85 ,  G06F21/79

摘要： A secure flash-card reader reads a user ID from a secure card and finds a matching entry with a hashed password in a user table on the reader. An encrypted key is received from a secure host that hashes and encrypts a password the user types into the host and the user's ID. A card decryption engine uses a random number to decrypt the encrypted key and recover the hashed password and user ID from the secure host, which is compared by a comparator to the hashed password and user ID from the user table. A mismatch causes an access controller to block access to encrypted data on the secure card. Flash data is transferred over a flash-serial buffer bus between flash-card controllers and a RAM buffer. An encryption engine on the flash-serial buffer bus encrypts and decrypts data and connects to a serial engine to the host.

摘要翻译： 安全的闪存读卡器从安全卡读取用户ID，并在阅读器的用户表中找到具有散列密码的匹配条目。 从安全主机接收加密密钥，该密钥对用户键入的密码和用户的ID进行散列和加密。 卡解密引擎使用随机数来解密加密的密钥，并从安全主机恢复散列密码和用户ID，由比较器与用户表中的散列密码和用户ID进行比较。 不匹配导致访问控制器阻止访问安全卡上的加密数据。 闪存数据通过闪存卡控制器和RAM缓冲区之间的闪存串行缓冲区总线进行传输。 闪存串行缓冲总线上的加密引擎加密和解密数据，并连接到主机的串行引擎。

公开(公告)号：US07610438B2

公开(公告)日：2009-10-27

申请号：US11623860

申请日：2007-01-17

申请人： Charles C. Lee ,  I-Kang Yu ,  Edward W. Lee ,  Ming-Shiang Shen

发明人： Charles C. Lee ,  I-Kang Yu ,  Edward W. Lee ,  Ming-Shiang Shen

IPC分类号： G06F12/06

CPC分类号： G06F12/0868 ,  G06F12/0246 ,  G06F12/0804 ,  G06F2212/2022 ,  G06F2212/214

摘要： A flash-memory cache card caches data that a host writes to a hard disk drive. A flash-memory array has physical blocks of flash memory arranged into first and second data areas having M blocks each, and a wear-leveling-counter pool. An incoming logical sector address (LSA) from a host is mapped to one of M entries in a RAM lookup table using a hash of modulo M. The RAM entry stores a mapping to a physical block in a foreground area that is either the first or the second data area. Pages in the physical block are read for a matching LSA that indicates a cache hit. Full pages are written back to the hard disk and erased in the background while the other data area becomes the foreground area. A new physical block with a low wear-level count is selected from blocks in the new foreground area.

摘要翻译： 闪存缓存卡缓存主机写入硬盘驱动器的数据。 闪存阵列具有布置在每个具有M个块的第一和第二数据区域中的闪存的物理块和磨损平衡计数器池。 来自主机的输入逻辑扇区地址（LSA）被映射到使用模M的散列的RAM查找表中的M个条目之一.RAM条目存储到前景区域中的物理块的映射，该物理块是第一个或 第二个数据区。 对于指示缓存命中的匹配LSA，将读取物理块中的页面。 完整的页面将被写回硬盘并在后台擦除，而另一个数据区域成为前台区域。 从新的前景区域的块中选择具有低磨损级别计数的新物理块。

公开(公告)号：US07035110B1

公开(公告)日：2006-04-25

申请号：US10964412

申请日：2004-10-12

申请人： Kuang-Yu Wang ,  Jim Ni ,  Ren-Kang Chiou ,  Edward W. Lee

发明人： Kuang-Yu Wang ,  Jim Ni ,  Ren-Kang Chiou ,  Edward W. Lee

IPC分类号： H05K5/02

CPC分类号： H05K5/0278

摘要： A computer peripheral device including a USB plug connector in which a reinforced connecting ring is mounted over the front flange of a two-part housing, and includes an opening through which the USB plug connector protrudes. The connecting ring includes a collar that is sized to mount over the front flange using an interference fit. The connecting ring also includes a front plate that protects a front of the housing from damage during use. An optional rear connecting ring is used to further secure the housing together.

摘要翻译： 一种包括USB插头连接器的计算机外围设备，其中加强的连接环安装在两部分壳体的前凸缘上，并且包括USB插头连接器穿过的开口。 连接环包括一个套环，其大小适于使用过盈配合安装在前凸缘上。 连接环还包括前板，其在使用期间保护壳体的前部不被损坏。 可选的后连接环用于进一步将壳体固定在一起。

公开(公告)号：US07892372B2

公开(公告)日：2011-02-22

申请号：US11663752

申请日：2005-10-11

申请人： Edward W. Lee ,  Avraham Benatar ,  David Grewell

发明人： Edward W. Lee ,  Avraham Benatar ,  David Grewell

IPC分类号： B32B37/00

CPC分类号： B29C65/081 ,  B23K20/10 ,  B29C65/08 ,  B29C66/1122 ,  B29C66/342 ,  B29C66/41 ,  B29C66/43 ,  B29C66/45 ,  B29C66/721 ,  B29C66/723 ,  B29C66/72321 ,  B29C66/73754 ,  B29C66/7392 ,  B29C66/73921 ,  B29C66/7394 ,  B29C66/73941 ,  B29C66/81422 ,  B29C66/8242 ,  B29C66/8322 ,  B29C66/836 ,  B29C66/91216 ,  B29C66/91221 ,  B29C66/91411 ,  B29C66/91443 ,  B29C66/919 ,  B29C66/9192 ,  B29C66/91951 ,  B29C66/92211 ,  B29C66/9241 ,  B29C66/929 ,  B29C66/934 ,  B29C66/93431 ,  B29C66/939 ,  B29C66/949 ,  B29C66/9516 ,  B29C66/9517 ,  B29C66/954 ,  B29C66/9592 ,  B29C66/961 ,  B29C66/962 ,  B29C66/965 ,  B29C66/966 ,  B29K2101/10 ,  B29K2101/12 ,  B29K2105/06 ,  B29L2009/00

摘要： A method for ultrasonic debulking a composite laminate (105) includes the steps of defining a path (115) across the laminate, the path having a starting location and an ending location and applying a force (109) to and transmitting ultrasonic vibration (111) into the laminate along the path, beginning at the starting location and ending at the ending location. The method further includes determining a temperature of a surface (103, 123) of the laminate proximate to the path and varying at least one of an amplitude of the ultrasonic vibration, the applied force, a feed rate at which the force and the ultrasonic vibration are applied along the path, an angle at which the ultrasonic vibration is applied to the laminate, and an interval at which plies of the laminate are processed, based upon the determined temperature of the surface of the laminate.

摘要翻译： 一种用于复合层压板（105）的超声降解方法包括以下步骤：跨越层叠体限定路径（115），该路径具有起始位置和终止位置，并向其施加力（109）并传递超声波振动（111） 沿着路径进入层压板，从起始位置开始并在结束位置结束。 该方法还包括确定接近该路径的层压板的表面（103,123）的温度，并且改变超声波振动的幅度，所施加的力，力和超声波振动的进给速率中的至少一个 基于层压体的表面的确定的温度沿着路径施加超声波振动施加到层压体的角度以及层压体的层的处理间隔。