公开(公告)号：US20080148408A1

公开(公告)日：2008-06-19

申请号：US11652128

申请日：2007-01-11

Applicant: Hsin-Chieh Kao ,  Chih-Hung Lin

Inventor： Hsin-Chieh Kao ,  Chih-Hung Lin

IPC: G06F11/00

CPC classification number: H04L63/1433 ,  G06F21/577 ,  G06F2221/2119 ,  H04L43/50

Abstract: A system and a method of parsing web page element to detect web page vulnerability and a recording medium thereof are provided. The method includes parsing elements in a target web page after requesting a web page server for the target web page, fetching attackable elements from the parsed elements and converting the attackable elements into attackable components, and then using all of the attackable components to perform a penetrable test on the web page server, so as to download more indirect web pages, thereby increasing the test coverage. Moreover, repetitive or test-free elements can be filtered by converting the attackable elements into the attackable components, so as to accelerate the detection.

Abstract translation: 提供了解析网页元素以检测网页漏洞的系统和方法及其记录介质。 该方法包括在请求目标网页的网页服务器之后解析目标网页中的元素，从解析的元素获取可攻击元素并将可攻击元素转换成可攻击的组件，然后使用所有可攻击的组件来执行可穿透的 在网页服务器上进行测试，以便下载更多的间接网页，从而提高测试覆盖率。 此外，可以通过将可攻击元素转换为可攻击组件来过滤重复或无测试元素，以加速检测。

公开(公告)号：US07385425B1

公开(公告)日：2008-06-10

申请号：US11675087

申请日：2007-02-15

Applicant: Chin-Fu Li ,  Chih-Hung Lin ,  Jiunn-Tsair Chen

Inventor： Chin-Fu Li ,  Chih-Hung Lin ,  Jiunn-Tsair Chen

IPC: H03K19/094 ,  H03K3/00

CPC classification number: H03K19/09441

Abstract: A printed circuit unit implementing with organic transistors is provided. The printed circuit unit includes an input signal circuit, a load circuit and a level shifter. The input signal circuit includes N serially connected organic transistors. When one of the serially connected organic transistors is cut-off, the signal input circuit is cut-off, so that the circuit is maintained to output a correct voltage level. The level shifter circuit includes an organic transistor having a gate for receiving the input signal. The organic transistor can also serve as a load for improving a gain of the level shifter.

Abstract translation: 提供了一种用有机晶体管实现的印刷电路单元。 印刷电路单元包括输入信号电路，负载电路和电平转换器。 输入信号电路包括N个串联连接的有机晶体管。 当串联连接的有机晶体管中的一个截止时，信号输入电路被截止，使得电路被保持以输出正确的电压电平。 电平移位器电路包括具有用于接收输入信号的栅极的有机晶体管。 有机晶体管也可以用作改善电平移位器的增益的负载。

公开(公告)号：US20070273651A1

公开(公告)日：2007-11-29

申请号：US11456041

申请日：2006-07-06

Applicant: Hsiao-Lung Chiang ,  Chun-Nan Su ,  Hong-Che Yen ,  Chih-Hung Lin

Inventor： Hsiao-Lung Chiang ,  Chun-Nan Su ,  Hong-Che Yen ,  Chih-Hung Lin

IPC: G09G5/08

CPC classification number: G06F3/03543 ,  G06F3/0362

Abstract: A cursor control device includes a main body, a circuit board, a base, a touch support stand, a touch sensor and a knock sensor. The circuit board is disposed within the main body. The base is disposed within the main body and above the circuit board, and includes an elongated slot. The touch support stand is mounted on the base and aligned with the elongated slot. The touch sensor is supported on the touch support stand and electrically connected to the circuit board. In response to a touching action on the touch sensor, a screen scrolling signal is generated. The knock sensor is mounted on the circuit board and under the touch support stand. The knock sensor is triggered when the touch support stand is moved to touch the knock sensor.

Abstract translation: 光标控制装置包括主体，电路板，基座，触摸支撑架，触摸传感器和爆震传感器。 电路板设置在主体内。 基座设置在主体内并位于电路板之上，并且包括细长的槽。 触摸支撑架安装在基座上并与细长的槽对准。 触摸传感器支撑在触摸支撑架上并电连接到电路板。 响应于对触摸传感器的触摸动作，产生屏幕滚动信号。 爆震传感器安装在电路板上和触摸支架下方。 当触摸支撑架移动以触摸爆震传感器时，触发传感器被触发。

公开(公告)号：US20050219968A1

公开(公告)日：2005-10-06

申请号：US11096581

申请日：2005-04-01

Applicant: Chih-Hung Lin ,  Hsiang-Hao Lee ,  Hung-Ping Liu ,  Kun Yang

Inventor： Chih-Hung Lin ,  Hsiang-Hao Lee ,  Hung-Ping Liu ,  Kun Yang

IPC: G11B7/085 ,  G11B17/04 ,  G11B19/12

CPC classification number: G11B19/124 ,  G11B17/056

Abstract: A method for controlling disk-tray ejection in an optical disk apparatus is provided. The optical disk apparatus includes a control unit and a tray that supports a disk. The method includes the steps of: (a) determining the diameter value of the disk; (b) driving the tray by the control unit with a first driving force to process the disk ejection procedure if the diameter value is a first length; and (c) driving the tray by the control unit with a second driving force to process the disk ejection procedure if the diameter is not the first length.

Abstract translation: 提供了一种用于控制光盘装置中盘盘排出的方法。 光盘装置包括控制单元和支撑盘的托盘。 该方法包括以下步骤：（a）确定盘的直径值; （b）如果所述直径值是第一长度，则利用所述控制单元用所述第一驱动力驱动所述托盘以处理所述盘喷射程序; 和（c）如果直径不是第一长度，则用第二驱动力由控制单元驱动托盘以处理盘排出程序。

公开(公告)号：US06303439B1

公开(公告)日：2001-10-16

申请号：US09449297

申请日：1999-11-24

Applicant: Robin Lee ,  Chih-Hung Lin

Inventor： Robin Lee ,  Chih-Hung Lin

IPC: H01L218247

CPC classification number: H01L29/66825 ,  H01L21/28273 ,  H01L29/7887

Abstract: A method for fabricating a two-bit flash memory cell is described in which a substrate with a trench formed therein is provided. A conformal tunnel oxide layer is then formed on the substrate, followed by forming polysilicon spacers on the portion of the tunnel oxide layer which covers the sidewalls of the trench. The polysilicon spacers are separated into a first polysilicon spacer on the right sidewall and a second polysilicon spacer on the left sidewall. Thereafter, a gate oxide layer is formed on the polysilicon spacers, followed by forming a polysilicon gate on the gate oxide layer in the substrate. Subsequently, a source/drain region is formed on both sides of the polysilicon gate in the substrate.

Abstract translation: 描述了一种用于制造双位闪存单元的方法，其中提供了形成有沟槽的衬底。 然后在衬底上形成保形隧道氧化物层，随后在覆盖沟槽侧壁的隧道氧化物层的部分上形成多晶硅间隔物。 多晶硅间隔物被分离成右侧壁上的第一多晶硅间隔物和左侧壁上的第二多晶硅间隔物。 此后，在多晶硅间隔物上形成栅极氧化层，随后在衬底的栅极氧化物层上形成多晶硅栅极。 随后，在衬底中的多晶硅栅极的两侧上形成源/漏区。

公开(公告)号：US06207504B1

公开(公告)日：2001-03-27

申请号：US09223337

申请日：1998-12-30

Applicant: Alex Hsieh ,  Chun-Ming Wu ,  Chih-Hung Lin

Inventor： Alex Hsieh ,  Chun-Ming Wu ,  Chih-Hung Lin

IPC: H01L21336

CPC classification number: H01L27/11521 ,  H01L27/115

Abstract: A method of fabricating flash erasable programmable read only memory. A substrate having an isolation structure is provided. A tunnel oxide layer and a floating gate layer are formed in sequence over substrate and are patterned. An ion implantation is performed and a first doped region is formed in the substrate. An oxidation step is performed to form a first oxide layer over the substrate. A nitride/oxide layer and a control gate layer are formed in sequence over the substrate. The control gate layer, the nitride/oxide layer, the first oxide layer, and the floating gate layer are patterned until the substrate is exposed. An ion implantation step is performed to form a common source region and a drain region in the substrate. Spacers are formed over the sidewalls of the control gate layer, the nitride/oxide layer, the first oxide layer, and the floating gate layer. A self-aligned silicide step is performed to form silicide layers over the control gate layer, the common source region, and the drain region.

Abstract translation: 一种制造闪存可擦除可编程只读存储器的方法。 提供具有隔离结构的基板。 在衬底上依次形成隧道氧化物层和浮栅，并进行图案化。 进行离子注入并且在衬底中形成第一掺杂区域。 执行氧化步骤以在衬底上形成第一氧化物层。 在衬底上依次形成氮化物/氧化物层和控制栅极层。 对控制栅极层，氮化物/氧化物层，第一氧化物层和浮置栅极层进行图案化，直到基板露出为止。 执行离子注入步骤以在衬底中形成公共源极区域和漏极区域。 间隔件形成在控制栅极层，氮化物/氧化物层，第一氧化物层和浮动栅极层的侧壁上。 执行自对准硅化物步骤以在控制栅极层，公共源极区域和漏极区域上形成硅化物层。

公开(公告)号：US5716874A

公开(公告)日：1998-02-10

申请号：US603248

申请日：1996-02-20

Applicant: Joe Ko ,  Gary Hong ,  Chih-Hung Lin

Inventor： Joe Ko ,  Gary Hong ,  Chih-Hung Lin

IPC: H01L21/336 ,  H01L21/8247

CPC classification number: H01L29/66825

Abstract: A method of fabricating an EPROM memory increases a coupling ratio and reduces lateral diffusion by forming a gate oxide layer and a coupling insulator individually. A substrate is provided with a field oxide layer to isolate a predetermined active area. A gate oxide layer is formed on the substrate. On the field oxide layer and the gate oxide layer, a polysilicon layer is deposited and defined, whereby a portion of this polysilicon layer and gate oxide layer form a gate electrode. Using the gate electrode as a mask, the substrate is implanted with impurities to provide source and drain electrodes. A dielectric layer is formed on polysilicon layer. A contact window (via) is formed in a predetermined area of dielectric layer. An insulator is deposited and defined by etching, on dielectric layer and the contact window. On the insulator and dielectric layer, a metal contact layer is deposited and defined to cover the insulator.

Abstract translation: 制造EPROM存储器的方法通过单独形成栅极氧化物层和耦合绝缘体来增加耦合比并减小横向扩散。 衬底设置有场氧化物层以隔离预定的有效面积。 在衬底上形成栅氧化层。 在场氧化物层和栅极氧化物层上沉积并限定多晶硅层，由此该多晶硅层和栅极氧化物层的一部分形成栅电极。 使用栅电极作为掩模，衬底被注入杂质以提供源极和漏极。 介电层形成在多晶硅层上。 在电介质层的预定区域中形成接触窗（通孔）。 通过在电介质层和接触窗上进行蚀刻来沉积并限定绝缘体。 在绝缘体和电介质层上，沉积和限定金属接触层以覆盖绝缘体。

公开(公告)号：USD910408S1

公开(公告)日：2021-02-16

申请号：US29708162

申请日：2019-10-03

Applicant: Chih-Hung Lin

Designer： Chih-Hung Lin

公开(公告)号：US20190230895A1

公开(公告)日：2019-08-01

申请号：US15884432

申请日：2018-01-31

Applicant: Chih-Hung Lin ,  Li- Wen Shen

Inventor： Chih-Hung Lin ,  Li- Wen Shen

IPC: A01K1/03 ,  A01K1/035

CPC classification number: A01K1/033 ,  A01K1/035

Abstract: A pet combination house includes a housing and a connecting unit. The housing includes a plurality of plates, with a folding line being formed at a connection of two plates. The plates are folded upward along the folding line and are connected together to construct the housing. Some of the plates have a side respectively provided with a fastening member. The fastening members of the plates are detachably combined together in pairs when the housing is disposed at the three-dimensional state. At least one of the plates is provided with an opening. At least one of the plates has a face provided with a plurality of apertures. The connecting unit includes a plurality of retaining members mounted on the plates and aligning with the apertures, and a plurality of connecting members mounted in the apertures and retained by the retaining members.

公开(公告)号：US20180192804A1

公开(公告)日：2018-07-12

申请号：US15399830

申请日：2017-01-06

Applicant: Chih-Hung Lin

Inventor： Chih-Hung Lin

IPC: A47G23/02 ,  B32B27/06 ,  B32B5/18 ,  B65D81/38

CPC classification number: A47G23/0216 ,  A47G23/0241 ,  B32B5/18 ,  B32B27/06 ,  B32B2323/043 ,  B32B2323/046 ,  B32B2439/00 ,  B65D81/3886

Abstract: A foldable container sleeve adapted to sleeve around a container includes a sleeve body for sleeving around the container. The sleeve body includes an insulating layer for wrapping around and contacting the container, a laminating layer disposed along and connected to an exterior surface of the insulating layer, and a smooth layer disposed along and connected to an exterior surface of the laminating layer. The insulating layer is made of a polyethylene foam material, the laminating layer is made of a polyethylene material, and the smooth layer is made of a thermoplastic material.