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公开(公告)号：US20210064979A1
公开(公告)日：2021-03-04
申请号：US16554984
申请日：2019-08-29
Inventor： Toru IDO , David Paul SINGLETON , Gordon James BATES , John Anthony BRESLIN
Abstract: This application relates to computing circuitry (200, 500, 600) for analogue computing. A plurality of current generators (201) are each configured to generate a defined current (ID1, ID2, . . . IDj) based on a respective input data value (D1, D2, . . . Dj). A memory array (202), having at least one set (204) of programmable-resistance memory cells (203), is arranged to receive the defined currents from each of the current generators at a respective signal line (206). Each set (204) of programmable-resistance memory cells (203) includes a memory cell associated with each signal line that, in use, can be connected between the relevant signal line and a reference voltage so as to generate a voltage on the signal line. An adder module (207) is coupled to each of the signal lines to generate a voltage at an output node (210) based on the sum of the voltages on each of the signal lines.
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公开(公告)号：US20190356287A1
公开(公告)日：2019-11-21
申请号：US15982237
申请日：2018-05-17
Inventor： John Paul LESSO , Toru IDO
Abstract: The present disclosure relates to Class D amplifier circuitry comprising: an input for receiving an input signal; first and second output nodes for driving a load connected between the first and second output nodes. A first driver stage is provided for switching the first node between a first supply rail and a second supply rail, and a second driver stage is provided for switching the second node between the first supply rail and the second supply rail. The Class D amplifier circuitry also includes first driver control circuitry configured to receive a first carrier wave and control the switching of the first driver stage based in part on the first carrier wave; second driver control circuitry configured to receive a second carrier wave and control the switching of the second driver stage based in part on the second carrier wave; and a carrier wave generator configured to provide the first carrier wave and the second carrier wave. A phase shift between the first carrier wave and the second carrier wave is adjustable responsive to a mode control signal.
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公开(公告)号：US20180159490A1
公开(公告)日：2018-06-07
申请号：US15886103
申请日：2018-02-01
Inventor： John Paul LESSO , Toru IDO
CPC classification number: H03G3/3089 , H03F1/26 , H03F1/32 , H03F1/34 , H03F3/187 , H03F3/217 , H03F3/2171 , H03F3/2173 , H03F3/2175 , H03F2200/102 , H03F2200/339 , H03F2200/432 , H03G7/002 , H03G7/007
Abstract: This application relates to Class D amplifier circuits (200). A modulator (201) controls a Class D output stage (202) based on a modulator input signal (Dm) to generate an output signal (Vout) which is representative of an input signal (Din). An error block (205), which may comprise an ADC (207), generates an error signal (ϵ) from the output signal and the input signal. In various embodiments the extent to which the error signal (ϵ) contributes to the modulator input signal (Dm) is variable based on an indication of the amplitude of the input signal (Din). The error signal may be received at a first input (204) of a signal selector block (203). The input signal may be received at a second input (206) of the signal selector block (203). The signal selector block may be operable in first and second modes of operation, wherein in the first mode the modulator input signal is based at least in part on the error signal; and in the second mode the modulator input signal is based on the digital input signal and is independent of the error signal. The error signal can be used to reduce distortion at high signal levels but is not used at low signal levels and so the noise floor at low signal levels does not depend on the component of the error block (205).
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公开(公告)号：US20170180859A1
公开(公告)日：2017-06-22
申请号：US15380463
申请日：2016-12-15
Inventor： John Paul LESSO , Toru IDO
IPC: H04R3/12
Abstract: This application describes methods and apparatus for mitigating the effects of crosstalk in multichannel audio. An audio driver circuit (200) for driving first and second audio loads (103) having a common return path (RC), has first and second signal paths (Left and Right). A crosstalk compensation block (205) is configured to add a first compensation signal to the first signal path and add a second compensation signal to the second signal path. The first compensation signal is generated based on the second audio signal and a first compensation function and the second compensation signal is generated based on the first audio signal and a second compensation function. Each of the first and second compensation functions is based on a predetermined impedance value for at least part of the common return path (RH1) and is also based on a determined DC impedance value (ZL, ZR) for one of the first and second audio loads which is modified by a band correction factor (γ). The band correction factor modifies the DC impedance value so it is a better estimate of impedance across the frequency band of interest.
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公开(公告)号：US20240068980A1
公开(公告)日：2024-02-29
申请号：US18498918
申请日：2023-10-31
Inventor： John P. LESSO , Toru IDO
IPC: G01N27/327
CPC classification number: G01N27/3273 , G01R19/165
Abstract: Circuitry for measuring a characteristic of an electrochemical cell, the circuitry comprising: a comparator having a first comparator input, a second comparator input and a comparator output; a feedback path between the comparator output and the second comparator input configured to provide a feedback signal to the second comparator input; and a loop filter configured to apply filtering to the feedback path to generate the feedback signal, wherein the loop filter comprises the electrochemical cell.
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Patent Agency Ranking
公开(公告)号：US20230059646A1
公开(公告)日：2023-02-23
申请号：US17882254
申请日：2022-08-05
Inventor： John P. LESSO , Toru IDO
Abstract: Balancing circuitry for balancing a set of N cells in a battery, the balancing circuitry comprising: a switch network configured to be coupled to the cells; and a set of capacitors coupled in parallel between the switch network and a common node, wherein the switch network is controllable such that: during a first phase of operation of the balancing circuitry the set of capacitors is coupled to a first subset comprising N−1 adjacent cells of the set of N cells; and during a second phase of operation the set of capacitors is coupled to a second subset comprising N−1 adjacent cells of the set of N cells, wherein the second subset is different from the first subset, and wherein, in use of the balancing circuitry, the common node is coupled intermittently, periodically or permanently to a reference voltage.
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公开(公告)号：US20220182028A1
公开(公告)日：2022-06-09
申请号：US17113561
申请日：2020-12-07
Inventor： John P. LESSO , Toru IDO
Abstract: The present disclosure relates to circuitry for driving a piezoelectric transducer. The circuitry comprises amplifier circuitry configured to receive a drive signal and to output an output signal, based on the drive signal, to the piezoelectric transducer, a variable capacitor configured to be coupled in series with the piezoelectric transducer, and control circuitry. The control circuitry is configured to control a capacitance of the variable capacitor to compensate for hysteresis in the piezoelectric transducer and to control a gain of the amplifier circuitry to compensate for signal attenuation caused by the variable capacitor.
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公开(公告)号：US20210386320A1
公开(公告)日：2021-12-16
申请号：US17097919
申请日：2020-11-13
Inventor： John P. LESSO , Yanto SURYONO , Toru IDO
Abstract: A method of cough detection in a headset, the method comprising: receiving a first signal from an external transducer of the headset; receiving a second signal from an in-ear transducer of the headset; and detecting a cough of a user of the headset based on the first and second signals.
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公开(公告)号：US20210158797A1
公开(公告)日：2021-05-27
申请号：US17091316
申请日：2020-11-06
Inventor： John Paul LESSO , Toru IDO
Abstract: A method of detecting live speech comprises: receiving a signal containing speech; obtaining a first component of the received signal in a first frequency band, wherein the first frequency band includes audio frequencies; and obtaining a second component of the received signal in a second frequency band higher than the first frequency band. Then, modulation of the first component of the received signal is detected; modulation of the second component of the received signal is detected; and the modulation of the first component of the received signal and the modulation of the second component of the received signal are compared. It may then be determined that the speech may not be live speech, if the modulation of the first component of the received signal differs from the modulation of the second component of the received signal.
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公开(公告)号：US20200144996A1
公开(公告)日：2020-05-07
申请号：US16735297
申请日：2020-01-06
Inventor： Toru IDO
Abstract: This application relates to digital PWM modulation. A PWM modulator (400, 1100) has a PWM generator (402) configured to receive pulse width data (PWidth) and to output a PWM signal (SPWM) comprising a plurality of repeating PWM cycle periods, in which the duration of any pulse of the PWM signal in each PWM cycle period is based on the pulse width data. The PWM generator is configured to synchronise the PWM cycle periods, and the start and end of any PWM pulse, to a received first clock signal. The PWM generator is operable to generate pulses that have a positional error from a centred position within the PWM cycle period and a pulse position controller (403) is configured to control the position of a pulse in a PWM cycle period so as to at least partly compensate for the positional error of one or more preceding pulses.
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