公开(公告)号：US20160300960A1

公开(公告)日：2016-10-13

申请号：US15092929

申请日：2016-04-07

Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA ,  DENSO CORPORATION

Inventor： Hiroki MIYAKE ,  Tatsuji NAGAOKA ,  Shinichiro MIYAHARA ,  Sachiko AOI

IPC: H01L29/861 ,  H01L21/265 ,  H01L29/66

CPC classification number: H01L21/26513 ,  H01L29/0619 ,  H01L29/0692 ,  H01L29/1608 ,  H01L29/6606 ,  H01L29/872

Abstract: A diode is provided with a semiconductor substrate; an anode electrode located on a front surface of the semiconductor substrate; and a cathode electrode located on a rear surface of the semiconductor substrate. Each of the p-type contact regions includes: a first region being in contact with the anode electrode; a second region located on the rear surface side of the first region, having a p-type impurity density lower than a p-type impurity density in the first region; and a third region located on the rear surface side of the second region and having a p-type impurity density lower than the p-type impurity density in the second region. A thickness of the second region is thicker than a thickness of the first region.

Abstract translation: 二极管设置有半导体衬底; 位于所述半导体衬底的前表面上的阳极; 以及位于半导体衬底的后表面上的阴极电极。 每个p型接触区域包括：与阳极电极接触的第一区域; 位于所述第一区域的背面侧的第二区域，具有比所述第一区域中的p型杂质浓度低的p型杂质浓度; 以及位于第二区域的背面侧的第三区域，并且具有比第二区域中的p型杂质浓度低的p型杂质浓度。 第二区域的厚度比第一区域的厚度厚。

公开(公告)号：US20150084124A1

公开(公告)日：2015-03-26

申请号：US14491332

申请日：2014-09-19

Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA ,  DENSO CORPORATION

Inventor： Jun SAITO ,  Sachiko AOI ,  Yukihiko WATANABE ,  Toshimasa YAMAMOTO

IPC: H01L29/78 ,  H01L29/423

CPC classification number: H01L29/7811 ,  H01L29/0619 ,  H01L29/0623 ,  H01L29/0653 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/7397 ,  H01L29/7813

Abstract: A semiconductor device includes a semiconductor substrate having an element region and a termination region. The element region includes a first body region having a first conductivity type, a first drift region having a second conductivity type, and first floating regions having the first conductivity type. The termination region includes FLR regions, a second drift region and second floating regions. The FLR regions have the first conductivity type and surrounds the element region. The second drift region has the second conductivity type, makes contact with and surrounds the FLR regions. The second floating regions have the first conductivity type and is surrounded by the second drift region. The second floating regions surround the element region. At least one of the second floating regions is placed at an element region side relative to the closest one of the FLR regions to the element region.

Abstract translation: 半导体器件包括具有元件区域和端接区域的半导体衬底。 元件区域包括具有第一导电类型的第一主体区域，具有第二导电类型的第一漂移区域和具有第一导电类型的第一浮动区域。 终止区域包括FLR区域，第二漂移区域和第二浮动区域。 FLR区域具有第一导电类型并且围绕元件区域。 第二漂移区域具有第二导电类型，与FLR区域接触并围绕FLR区域。 第二浮动区域具有第一导电类型并被第二漂移区域围绕。 第二浮动区域围绕元件区域。 第二浮动区域中的至少一个相对于元件区域中最近的一个FLR区域放置在元件区域侧。

公开(公告)号：US20220005928A1

公开(公告)日：2022-01-06

申请号：US17477168

申请日：2021-09-16

Applicant: DENSO CORPORATION ,  TOYOTA JIDOSHA KABUSHIKI KAISHA

Inventor： Yuichi TAKEUCHI ,  Ryota SUZUKI ,  Tatsuji NAGAOKA ,  Sachiko AOI

IPC: H01L29/16 ,  H01L21/02 ,  H01L29/06 ,  H01L29/423 ,  H01L29/66 ,  H01L29/78 ,  H01L29/12

Abstract: In a guard ring section of a silicon carbide semiconductor device, an electric field relaxation layer for relaxing an electric field is formed in a surface layer portion of a drift layer, so that electric field is restricted from penetrating between guard rings. Thus, an electric field concentration is relaxed. Accordingly, a SiC semiconductor device having a required withstand voltage is obtained.

公开(公告)号：US20200381313A1

公开(公告)日：2020-12-03

申请号：US16997210

申请日：2020-08-19

Applicant: DENSO CORPORATION ,  TOYOTA JIDOSHA KABUSHIKI KAISHA

Inventor： Akira AMANO ,  Takayuki SATOMURA ,  Yuichi TAKEUCHI ,  Katsumi SUZUKI ,  Sachiko AOI

IPC: H01L21/66 ,  H01L29/78 ,  G01B11/06 ,  H01L29/12 ,  H01L21/265 ,  H01L29/16 ,  H01L29/66

Abstract: When a film thickness of a second epitaxial film is measured, an infrared light is irradiated from a surface side of the second epitaxial film onto a base layer on which a first epitaxial film and the second epitaxial film are formed. A reflected light from an interface between the first epitaxial film and the base layer and a reflected light from a surface of the second epitaxial film are measured to obtain a two-layer film thickness, which is a total film thickness of the first epitaxial film and the second epitaxial film. The film thickness of the second epitaxial film is calculated by subtracting a one-layer film thickness, which is a film thickness of the first epitaxial film, from the two-layer film thickness.

公开(公告)号：US20190288074A1

公开(公告)日：2019-09-19

申请号：US16427413

申请日：2019-05-31

Applicant: DENSO CORPORATION ,  TOYOTA JIDOSHA KABUSHIKI KAISHA

Inventor： Yuichi TAKEUCHI ,  Ryota SUZUKI ,  Tatsuji NAGAOKA ,  Sachiko AOI

IPC: H01L29/16 ,  H01L29/78 ,  H01L29/06 ,  H01L29/66 ,  H01L29/423 ,  H01L21/02

Abstract: In a guard ring section of a silicon carbide semiconductor device, an electric field relaxation layer for relaxing an electric field is formed in a surface layer portion of a drift layer, so that electric field is restricted from penetrating between guard rings. Thus, an electric field concentration is relaxed. Accordingly, a SiC semiconductor device having a required withstand voltage is obtained.

公开(公告)号：US20190214264A1

公开(公告)日：2019-07-11

申请号：US16353670

申请日：2019-03-14

Applicant: DENSO CORPORATION ,  TOYOTA JIDOSHA KABUSHIKI KAISHA

Inventor： Shigeyuki TAKAGI ,  Masaki SHIMOMURA ,  Yuichi TAKEUCHI ,  Katsumi SUZUKI ,  Sachiko AOI

IPC: H01L21/3065 ,  H01L29/10 ,  H01L29/66 ,  H01L29/872 ,  H01L29/78 ,  H01L29/16 ,  H01L23/544 ,  H01L21/02 ,  H01L21/311

Abstract: In a manufacturing method of a silicon carbide semiconductor device, a semiconductor substrate made of silicon carbide and on which a base layer is formed is prepared, a trench is provided in the base layer, a silicon carbide layer is epitaxially formed on a surface of the base layer while filling the trench with the silicon carbide layer, the sacrificial layer is planarized by reflow after forming the sacrificial layer, and the silicon carbide layer is etched back together with the planarized sacrificial layer by dry etching under an etching condition in which an etching selectivity of the silicon carbide layer to the sacrificial layer is 1.

公开(公告)号：US20190043999A1

公开(公告)日：2019-02-07

申请号：US16073924

申请日：2017-01-31

Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA ,  DENSO CORPORATION

Inventor： Tatsuji NAGAOKA ,  Sachiko AOI ,  Yasushi URAKAMI

IPC: H01L29/872 ,  H01L29/24 ,  H01L29/06 ,  H01L29/40

Abstract: A diode includes: a semiconductor substrate including a first surface including a first range and a second range surrounding the first range, the first surface of the semiconductor substrate protruding in the first range from the second range such that the first surface having a step along a border between the first range and the second range; a first electrode that is in Schottky contact with the first electrode within the first range; an interlayer insulating film that covers the step, the second range, and an end portion of the first electrode; and a field plate electrode conductively connected to the first electrode. The field plate electrode covers a region of the interlayer insulating film covering the end portion of the first electrode and a region of the interlayer insulating film covering the step, and extends onto a region of the interlayer insulating film covering the second range.

公开(公告)号：US20190035944A1

公开(公告)日：2019-01-31

申请号：US16072417

申请日：2017-01-31

Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA ,  DENSO CORPORATION

Inventor： Tatsuji NAGAOKA ,  Sachiko AOI ,  Yasushi URAKAMI

IPC: H01L29/872 ,  H01L29/06

Abstract: A diode includes a semiconductor substrate; a top surface electrode in contact with a part of the top surface of the semiconductor substrate; and a bottom surface electrode in contact with at least a part of the bottom surface of the semiconductor substrate. The semiconductor substrate includes: an n-type high-concentration layer in ohmic contact with the bottom surface electrode; an n-type intermediate-concentration layer on a part of the n-type high-concentration layer; and an n-type low-concentration layer on a part of the n-type high-concentration layer. The n-type low-concentration layer surrounds the n-type intermediate-concentration layer. The top surface electrode is in Schottky contact with a top surface of the n-type intermediate-concentration layer, and a contact region where the top surface electrode and the semiconductor substrate are in contact extends onto then-type low-concentration layer beyond the n-type intermediate-concentration layer.

公开(公告)号：US20170040441A1

公开(公告)日：2017-02-09

申请号：US15101165

申请日：2014-12-22

Applicant: KABUSHIKI KAISHA TOYOTA CHUO KENKYUSHO ,  TOYOTA JIDOSHA KABUSHIKI KAISHA ,  DENSO CORPORATION

Inventor： Sachiko AOI ,  Yukihiko WATANABE ,  Katsumi SUZUKI ,  Naohiro SUZUKI

IPC: H01L29/739 ,  H01L29/06 ,  H01L29/10 ,  H01L29/16

CPC classification number: H01L29/7397 ,  H01L29/0615 ,  H01L29/0619 ,  H01L29/0623 ,  H01L29/063 ,  H01L29/1095 ,  H01L29/1608 ,  H01L29/7802 ,  H01L29/7811 ,  H01L29/7813

Abstract: A resurf layer and a guard ring are formed in a peripheral region in a position at the surface of the semiconductor substrate. The guard ring is formed more deeply than the resurf layer. When the guard ring is shallow and the impurity concentration of the resurf layer is low, the potential distribution at the deep portion of the resurf layer becomes unstable, and the resurf layer does not sufficiently exhibit the effect of improving the withstand voltage. When the guard ring is deep, the impurity concentration of the guard ring is high, the potential distribution at the deep portion of the resurf layer is regulated by the guard ring and the resurf layer sufficiently exhibits the effect of improving the withstand voltage.

Abstract translation: 在半导体基板的表面的位置的周边区域形成有再生层和保护环。 护环形成得比修复层更深。 当保护环较浅并且复合层的杂质浓度低时，再生层深部的电位分布变得不稳定，并且再生层不能充分发挥提高耐电压的效果。 当保护环较深时，保护环的杂质浓度高，再生层深处的电位分布由保护环调节，再生层充分发挥提高耐电压的效果。

公开(公告)号：US20160211319A1

公开(公告)日：2016-07-21

申请号：US15023498

申请日：2014-09-22

Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA ,  DENSO CORPORATION

Inventor： Jun SAITO ,  Sachiko AOI ,  Yukihiko WATANABE ,  Toshimasa YAMAMOTO

IPC: H01L29/06 ,  H01L29/739 ,  H01L29/78 ,  H01L29/10 ,  H01L29/423

CPC classification number: H01L29/0634 ,  H01L29/0623 ,  H01L29/0661 ,  H01L29/1095 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/7397 ,  H01L29/7811 ,  H01L29/7813

Abstract: A semiconductor device includes a semiconductor substrate. The element region of the semiconductor substrate includes a first body region having a first conductivity type, a first drift region having a second conductivity type, and a plurality of first floating regions, each the first floating regions having the first conductivity type. The termination region includes a second drift region having the second conductivity type, and a plurality of second floating regions, each of the second floating regions having the first conductivity type. The each of the second floating regions is surrounded by the second drift region. When a depth of a center of the first drift region is taken as a reference depth, at least one of the second floating regions is placed closer to the reference depth than each of the first floating regions.

Abstract translation: 半导体器件包括半导体衬底。 半导体衬底的元件区域包括具有第一导电类型的第一主体区域，具有第二导电类型的第一漂移区域和多个第一浮动区域，每个第一浮动区域具有第一导电类型。 终端区域包括具有第二导电类型的第二漂移区域和多个第二浮动区域，每个第二浮动区域具有第一导电类型。 第二浮动区域中的每一个被第二漂移区域包围。 当第一漂移区域的中心深度作为参考深度时，第二浮动区域中的至少一个被放置得比每个第一浮动区域更靠近参考深度。