VERTICAL SEMICONDUCTOR DEVICE
    6.
    发明申请
    VERTICAL SEMICONDUCTOR DEVICE 审中-公开
    垂直半导体器件

    公开(公告)号:US20170040441A1

    公开(公告)日:2017-02-09

    申请号:US15101165

    申请日:2014-12-22

    摘要: A resurf layer and a guard ring are formed in a peripheral region in a position at the surface of the semiconductor substrate. The guard ring is formed more deeply than the resurf layer. When the guard ring is shallow and the impurity concentration of the resurf layer is low, the potential distribution at the deep portion of the resurf layer becomes unstable, and the resurf layer does not sufficiently exhibit the effect of improving the withstand voltage. When the guard ring is deep, the impurity concentration of the guard ring is high, the potential distribution at the deep portion of the resurf layer is regulated by the guard ring and the resurf layer sufficiently exhibits the effect of improving the withstand voltage.

    摘要翻译: 在半导体基板的表面的位置的周边区域形成有再生层和保护环。 护环形成得比修复层更深。 当保护环较浅并且复合层的杂质浓度低时,再生层深部的电位分布变得不稳定,并且再生层不能充分发挥提高耐电压的效果。 当保护环较深时,保护环的杂质浓度高,再生层深处的电位分布由保护环调节,再生层充分发挥提高耐电压的效果。

    SILICON CARBIDE SEMICONDUCTOR DEVICE
    8.
    发明申请

    公开(公告)号:US20190334030A1

    公开(公告)日:2019-10-31

    申请号:US16505760

    申请日:2019-07-09

    摘要: A silicon carbide semiconductor device includes: a vertical semiconductor element, which includes: a semiconductor substrate made of silicon carbide and having a high impurity concentration layer on a back side and a drift layer on a front side; a base region made of silicon carbide on the drift layer; a source region arranged on the base region and made of silicon carbide; a deep layer disposed deeper than the base region; a trench gate structure including a gate insulation film arranged on an inner wall of a gate trench which is arranged deeper than the base region and shallower than the deep layer, and a gate electrode disposed on the gate insulation film; a source electrode electrically connected to the base region, the source region, and the deep layer; and a drain electrode electrically connected to the high impurity concentration layer.

    SILICON CARBIDE SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREFOR

    公开(公告)号:US20190386095A1

    公开(公告)日:2019-12-19

    申请号:US16304866

    申请日:2017-06-29

    摘要: Intervals of the frame portion and the p type guard ring on a cell portion side are made narrower than other parts, and the narrowed part provides a dot line portion. By narrowing the intervals of the frame portion and the p type guard ring on the cell portion side, the electric field concentration is reduced on the cell portion side, and the equipotential line directs to more outer circumferential side. By providing the dot line portions, the difference in the formation areas of the trench per unit area in the cell portion, the connection portion and the guard ring portion is reduced, and the thicknesses of the p type layers formed on the cell portion, the connection portion and the guard ring portion are uniformed. Thereby, when etching-back the p type layer, the p type layer is prevented from remaining as a residue in the guard ring portion.