公开(公告)号：US4398059A

公开(公告)日：1983-08-09

申请号：US240693

申请日：1981-03-05

Applicant: Kun-Shan Lin ,  Kathleen M. Goudie ,  Gene A. Frantz

Inventor： Kun-Shan Lin ,  Kathleen M. Goudie ,  Gene A. Frantz

IPC: G10L13/06 ,  G10L13/08 ,  G10L1/00

CPC classification number: G10L13/08

Abstract: An electronic, speech producing system receives allophonic codes and produces speech-like sounds corresponding to these codes, through a loud speaker. A micro-controller controls the retrieval, from a read-only memory, of digital signals representative of individual allophone parameters. The addresses at which such allophone parameters are located are directly related to the allophonic code. A dedicated microcontroller concatenates the digital signals representative of the allophone parameters, including code indicating stress and intonation patterns for the allophones. The allophones are divided into a plurality of frames with one digital position indicating whether the frame is the last frame in the allophone, in which event an extra frame is introduced to provide smoothing between allophones when no stop is present and when the present allophone is voiced and the subsequent allophone is voiced, or when the present allophone is unvoiced and the subsequent allophone is unvoiced. An LPC speech synthesizer receives the digital signals and provides analog signals corresponding thereto to the loud speaker to produce speech-like sounds with stress and intonation.

Abstract translation: 一个电子语音产生系统通过一个扬声器接收等高音码并产生与这些码相对应的类似语音的声音。 微控制器控制从只读存储器检索表示各个异音参数的数字信号。 这种异音素参数所在的地址与等离子体代码直接相关。 专用微控制器连接表示异音素参数的数字信号，包括表示压力的代码和声调模式。 变音器被分成多个帧，其中一个数字位置指示帧是否是异音素中的最后一帧，在这种情况下引入额外的帧以在不存在停止时和当现在的异音素被发音时提供平滑 并且随后的异音素被发声，或者当当前的异音素被清音并且随后的异音素被清音时。 LPC语音合成器接收数字信号并提供与其对应的模拟信号给扬声器以产生具有应力和语调的语音般的声音。

公开(公告)号：US07327931B2

公开(公告)日：2008-02-05

申请号：US10141663

申请日：2002-05-08

Applicant: Gene A. Frantz

Inventor： Gene A. Frantz

IPC: H04N5/76 ,  H04N7/00 ,  H04N5/445

CPC classification number: H04N21/4316 ,  H04N5/76 ,  H04N5/765 ,  H04N5/775 ,  H04N21/4147 ,  H04N21/4622 ,  H04N21/812 ,  H04N21/8352

Abstract: A recording and playback system comprising a personal video recorder (“PVR”) coupled to a television monitor. The PVR records a video broadcast stream which comprises main program information as well as commercial content. The commercial content includes commercial identifier values which indicate to the PVR the presence of commercial content. Thus, during playback on the monitor, the PVR monitors the recorded broadcast stream for the commercial identifiers to determine the presence of commercial content. A user can control the PVR to play back the recorded stream in a conventional manner in which commercials interrupt the main program information. Alternatively, the user can cause the PVR to play back the recorded broadcast stream in an alternate format in which the main program information continues to play concurrently with the commercial content.

Abstract translation: 一种记录和播放系统，包括耦合到电视监视器的个人录像机（“PVR”）。 PVR记录包括主节目信息以及商业内容的视频广播流。 商业内容包括向PVR指示商业内容的商业标识符值。 因此，在监视器上播放期间，PVR监视所记录的商业标识符的广播流，以确定商业内容的存在。 用户可以以广告中断主节目信息的常规方式控制PVR来播放记录的流。 或者，用户可以使PVR以主要节目信息继续与商业内容同时播放的替代格式来播放所记录的广播流。

公开(公告)号：US06910096B2

公开(公告)日：2005-06-21

申请号：US10452339

申请日：2003-06-02

Applicant: Masashi Hashimoto ,  Gene A. Frantz ,  John Victor Moravec ,  Jean-Pierre Dolait

Inventor： Masashi Hashimoto ,  Gene A. Frantz ,  John Victor Moravec ,  Jean-Pierre Dolait

IPC: G11C7/10 ,  G11C8/02 ,  H04B7/185 ,  G11C8/00 ,  G06F12/02

CPC classification number: G09G5/391 ,  G11C7/103 ,  G11C7/1036 ,  G11C7/1072 ,  G11C7/1075 ,  H04B7/18502

Abstract: A memory circuit (14) having features specifically adapted to permit the memory circuit (14) to serve as a video frame memory is disclosed. The memory circuit (14) contains a dynamic random access memory array (24) with buffers (18, 20) on input and output data ports (22) thereof to permit asynchronous read, write and refresh accesses to the memory array (24). The memory circuit (14) is accessed both serially and randomly. An address generator (28) contains an address buffer register (36) which stores a random access address and an address sequencer (40) which provides a stream of addresses to the memory array (24). An initial address for the stream of addresses is the random access address stored in the address buffer register (36).

Abstract translation: 公开了具有特别适于允许存储器电路（14）用作视频帧存储器的特征的存储器电路（14）。 存储器电路（14）包含在其输入和输出数据端口（22）上具有缓冲器（18,20）的动态随机存取存储器阵列（24），以允许对存储器阵列（24）的异步读取，写入和刷新访问。 存储器电路（14）被串行和随机地访问。 地址生成器（28）包含存储随机存取地址的地址缓冲寄存器（36）和向存储器阵列（24）提供地址流的地址定序器（40）。 地址流的初始地址是存储在地址缓冲寄存器（36）中的随机存取地址。

公开(公告)号：US06728829B2

公开(公告)日：2004-04-27

申请号：US10448934

申请日：2003-05-30

Applicant: Masashi Hashimoto ,  Gene A. Frantz ,  John Victor Moravec ,  Jean-Pierre Dolait

Inventor： Masashi Hashimoto ,  Gene A. Frantz ,  John Victor Moravec ,  Jean-Pierre Dolait

IPC: G11C804

CPC classification number: G09G5/391 ,  G11C7/103 ,  G11C7/1036 ,  G11C7/1072 ,  G11C7/1075 ,  H04B7/18502

Abstract: A memory circuit (14) having features specifically adapted to permit the memory circuit (14) to serve as a video frame memory is disclosed. The memory circuit (14) contains a dynamic random access memory array (24) with buffers (18, 20) on input and output data ports (22) thereof to permit asynchronous read, write and refresh accesses to the memory array (24). The memory circuit (14) is accessed both serially and randomly. An address generator (28) contains an address buffer register (36) which stores a random access address and an address sequencer (40) which provides a stream of addresses to the memory array (24). An initial address for the stream of addresses is the random access address stored in the address buffer register (36).

公开(公告)号：US06188635B1

公开(公告)日：2001-02-13

申请号：US08488231

申请日：1995-06-07

Applicant: Masashi Hashimoto ,  Gene A. Frantz ,  John Victor Moravec ,  Jean-Pierre Dolait

Inventor： Masashi Hashimoto ,  Gene A. Frantz ,  John Victor Moravec ,  Jean-Pierre Dolait

IPC: G11C800

CPC classification number: G09G5/391 ,  G11C7/103 ,  G11C7/1036 ,  G11C7/1072 ,  G11C7/1075 ,  H04B7/18502

Abstract: A memory circuit (14) having features specifically adapted to permit the memory circuit (14) to serve as a video frame memory is disclosed. The memory circuit (14) contains a dynamic random access memory array (24) with buffers (18, 20) on input and output data ports (22) thereof to permit asynchronious read, write and refresh accesses to the memory array (24). The memory circuit (14) is accessed both serially and randomly. An address generator (28) contains an address buffer register (36) which stores a random access address and an address sequencer (40) which provides a stream of addresses to the memory array (24). An initial address for the stream of addresses is the random access address stored in the address buffer register (36).

Abstract translation: 公开了具有特别适于允许存储器电路（14）用作视频帧存储器的特征的存储器电路（14）。 存储器电路（14）包含在其输入和输出数据端口（22）上具有缓冲器（18,20）的动态随机存取存储器阵列（24），以允许对存储器阵列（24）的异步读取，写入和刷新访问。 存储器电路（14）被串行和随机地访问。 地址生成器（28）包含存储随机存取地址的地址缓冲寄存器（36）和向存储器阵列（24）提供地址流的地址定序器（40）。 地址流的初始地址是存储在地址缓冲寄存器（36）中的随机存取地址。

公开(公告)号：US5638530A

公开(公告)日：1997-06-10

申请号：US49909

申请日：1993-04-20

Applicant: Basavaraj I. Pawate ,  Gene A. Frantz ,  Rajan Chirayil

Inventor： Basavaraj I. Pawate ,  Gene A. Frantz ,  Rajan Chirayil

IPC: G06F13/28 ,  G06F15/78 ,  G06F12/00

CPC classification number: G06F13/28 ,  G06F15/7842

Abstract: A method and system are provided for improved processing between a host computer (200) and process logic (170). Data instructions are stored at multiple memory locations of a memory (150). The data are processed in response to instructions by the process logic (170), which is integrated with the memory (150) within a single integrated circuit. The memory locations are directly accessible without bus arbitration by the external device coupled to the single integrated circuit through an external interface (180), which controls the processing speed of the process logic (170).

Abstract translation: 提供了一种方法和系统，用于改善主计算机（200）和处理逻辑（170）之间的处理。 数据指令存储在存储器（150）的多个存储器位置。 响应于在单个集成电路内与存储器（150）集成的处理逻辑（170）的指令来处理数据。 存储器位置可以通过外部设备直接访问，而外部设备通过控制处理逻辑（170）的处理速度的外部接口（180）耦合到单个集成电路。

公开(公告)号：US5557557A

公开(公告)日：1996-09-17

申请号：US317957

申请日：1994-10-04

Applicant: Gene A. Frantz ,  Subramaniyan Subuvenkat ,  Jonathan Bradley ,  James A. Larimer

Inventor： Gene A. Frantz ,  Subramaniyan Subuvenkat ,  Jonathan Bradley ,  James A. Larimer

IPC: G01R22/00 ,  G01R31/30 ,  G01R11/00

CPC classification number: G01R22/00 ,  G01R31/3004 ,  G06F2217/78

Abstract: A method for determining the energy consumption of a processor when executing a program is provided. The method initially selects the processor which will execute the program and then creates a model of energy used by said processor as a function of a plurality of instructions operable by said processor. The program whose energy consumption is to be determined is then executed using the energy model to determine the energy consumption of the program on the processor.

Abstract translation: 提供了一种用于在执行程序时确定处理器的能量消耗的方法。 该方法最初选择将执行程序的处理器，然后根据由所述处理器可操作的多个指令，创建由所述处理器使用的能量模型。 然后使用能量模型来执行能量消耗确定的程序，以确定处理器上程序的能量消耗。

公开(公告)号：US4731847A

公开(公告)日：1988-03-15

申请号：US372257

申请日：1982-04-26

Applicant: Gilbert A. Lybrook ,  Kun-Shan Lin ,  Gene A. Frantz

Inventor： Gilbert A. Lybrook ,  Kun-Shan Lin ,  Gene A. Frantz

IPC: G10H5/00 ,  G10L13/02 ,  G10L5/00

CPC classification number: G10L13/02 ,  G10H5/005 ,  G10H2250/455 ,  G10H2250/601

Abstract: An electronic apparatus in which the operator inputs both the textual material and a sequence of pitches which upon synthesization simulates singing qualities. The operator inputs a textual material, typically through a keyboard arrangement, and also a sequence of pitches as the tune of the desired song. The text is broken into syllable components which are matched to each note of the tune. The syllables are used to generate control parameters for the synthesizer from their allophonic components. The invention allows the entry of text and a pitch sequence so as to simulate electronically the singing of a tune.

Abstract translation: 一种电子设备，其中操作员输入文本材料和一系列音高，在合成时模拟唱歌的质量。 操作者通常通过键盘装置输入文本材料，并且还输入一系列音调作为所需乐曲的曲调。 文本被分解成与音乐的每个音符相匹配的音节分量。 音节用于从它们的变异分量产生合成器的控制参数。 本发明允许输入文本和音调序列，以便以电子方式模拟歌曲的唱歌。

公开(公告)号：US4380371A

公开(公告)日：1983-04-19

申请号：US130780

申请日：1980-03-17

Applicant: Gene A. Frantz

Inventor： Gene A. Frantz

IPC: G02F1/1343 ,  G06F3/147 ,  G09G3/18 ,  G02F1/13

CPC classification number: G09G3/18 ,  G02F1/134327 ,  G06F3/147

Abstract: A plurality of character forming segments are affixed to one surface of a front and back plate of a liquid crystal device. Three conductors affixed to one of the plates are each coupled to approximately one-third of the segment electrodes affixed to that plate. A plurality of conductors are affixed to the other plate and are each coupled to three of the segment electrodes affixed to that plate. Liquid crystal material is disposed between the two plates. By making use of the display device and a disclosed keyboard scanning circuit, an eight character position liquid crystal display device and a keyboard may be coupled to an electronic calculator chip disposed in a standard twenty-eight pin package.

Abstract translation: 多个字符形成段固定在液晶装置的前板和后板的一个表面上。 固定在其中一个板上的三个导体各自耦合到固定到该板上的大约三分之一的段电极。 多个导体固定到另一个板上，并且各自连接到固定到该板上的三个段电极。 液晶材料设置在两个板之间。 通过利用显示装置和所公开的键盘扫描电路，可以将八字符位置的液晶显示装置和键盘耦合到设置在标准二十八个引脚封装中的电子计算器芯片。

公开(公告)号：US4357489A

公开(公告)日：1982-11-02

申请号：US118138

申请日：1980-02-04

Applicant: Alva E. Henderson ,  Gene A. Frantz

Inventor： Alva E. Henderson ,  Gene A. Frantz

IPC: G09B19/06 ,  G10L13/04 ,  G10L1/00

CPC classification number: G09B19/06 ,  G10L13/047

Abstract: Integrated circuit speech synthesis system utilizing complementary metal-insulator-semiconductor technology to achieve low voltage operation, wherein a pluse width modulated digital-to-analog converter is employed to provide for accurate conversion of digital signals into analog signals even though the low voltage operation prohibits the large voltage swings normally required for digital-to-analog converter circuitry. The speech synthesis system includes a linear predictive filter as a speech synthesizer which utilizes coded reflection coefficients to produce digital signals representative of human speech. A microprocessor controls the access of digitized speech data which is stored in a memory. The speech synthesizer and microprocessor along with the pulse width modulated digital-to-analog converter are implemented in complementary metal-insulator-semiconductor technology. The system also includes a speaker for generating audible sounds in the form of synthesized human speech from the analog signals provided by the digital-to-analog converter.

Abstract translation: 利用互补金属绝缘体半导体技术实现低电压操作的集成电路语音合成系统，其中采用宽度调制的数模转换器来提供数字信号到模拟信号的精确转换，即使低电压操作禁止 数模转换器电路通常需要大的电压摆幅。 语音合成系统包括作为语音合成器的线性预测滤波器，其利用编码反射系数来产生表示人类语音的数字信号。 微处理器控制存储在存储器中的数字化语音数据的访问。 语音合成器和微处理器以及脉冲宽度调制的数模转换器在互补金属绝缘体半导体技术中实现。 该系统还包括一个扬声器，用于根据由数模转换器提供的模拟信号，以合成的人类语音的形式产生可听见的声音。